1 J. Liu, "Equalization in high speed communication systems" 4-15, 2004
2 M. Green, "Design of CMOS CML circuits for high-speed broadband communications" 204-207, 2003
3 D. Heidar, "Comparison of output drivers for high-speed serial links" 329-337, 2007
4 D. A. Yokoyama-Martin, "A multistandard low power 1.5-3.125Gb/s serial transceiver in 90nm CMOS" 401-404, 2006
5 K. Krishna, "A multigigabit backplane transceiver core in 0.13μm CMOS with a power-efficient equalization architecture" 40 (40): 2658-2666, 2005
6 M. Kossel, "A T-coil-enhanced 8.5Gb/s high-swing SST transmitter in 65nm bulk CMOS with < -16dB return loss over 10GHz bandwidth" 43 (43): 2905-2920, 2008
7 J.-H. Song, "A Low- Swing Differential Voltage-Mode Driver with Preemphasis and Self-Diagnosis" 2010
8 K.-L. J. Wong, "A 27-mW 3.6Gb/s I/O transceiver" 39 (39): 602-612, 2004
9 R. A. Philpott, "A 20Gb/s SerDes Transmitter with Adjustable Source Impedance and 4-tap Feed-Forward Equalization in 65nm Bulk CMOS" 623-626, 2008
10 C. Menolfi, "A 16Gb/s source-series-terminated transmitter in 65nm CMOS SOI" 446-447, 2007
1 J. Liu, "Equalization in high speed communication systems" 4-15, 2004
2 M. Green, "Design of CMOS CML circuits for high-speed broadband communications" 204-207, 2003
3 D. Heidar, "Comparison of output drivers for high-speed serial links" 329-337, 2007
4 D. A. Yokoyama-Martin, "A multistandard low power 1.5-3.125Gb/s serial transceiver in 90nm CMOS" 401-404, 2006
5 K. Krishna, "A multigigabit backplane transceiver core in 0.13μm CMOS with a power-efficient equalization architecture" 40 (40): 2658-2666, 2005
6 M. Kossel, "A T-coil-enhanced 8.5Gb/s high-swing SST transmitter in 65nm bulk CMOS with < -16dB return loss over 10GHz bandwidth" 43 (43): 2905-2920, 2008
7 J.-H. Song, "A Low- Swing Differential Voltage-Mode Driver with Preemphasis and Self-Diagnosis" 2010
8 K.-L. J. Wong, "A 27-mW 3.6Gb/s I/O transceiver" 39 (39): 602-612, 2004
9 R. A. Philpott, "A 20Gb/s SerDes Transmitter with Adjustable Source Impedance and 4-tap Feed-Forward Equalization in 65nm Bulk CMOS" 623-626, 2008
10 C. Menolfi, "A 16Gb/s source-series-terminated transmitter in 65nm CMOS SOI" 446-447, 2007
11 H. Hatamkhani, "A 10-mW 3.6-Gbps I/O transmitter" 97-98, 2003
12 C. Yoo, "A 1.8-V 700-Mb/s/pin 512-Mb DDR-II SDRAM with on-die termination and off-chip driver calibration" 39 (39): 941-951, 2004