3D-FOWLP에서 TMV (Through Mold Via) 유형(Cu-Via, EMC Filling Via)에 따른 열기계적 특성 시뮬레이션 분석

다국어 초록 (Multilingual Abstract)

Currently, Through mold via (TMV) technology is being actively researched for 3D-Intergrated Circuit stacking in fan-out wafer level packaging (FOWLP). However, because of problems, such as extrusion, cracking, and warping of the Cu materials forming the via, its mass production process is difficult. Moreover, sudden temperature changes when using the chips cause heat fatigue in the TMV. To overcome this problem, the Epoxy molding compound (EMC) filling via (EFV) is being developed to form a thin Cu via through a deposition process and then fill the interior of the via with EMC. Through simulations, this study analyzed the thermal-mechanical properties of the TMV in the 3D-FOWLP according to the type of TMV (Cu via and EFV) to minimize the thermal stress and deformation generated when using the chip. Consequently, EFV exhibits better thermal-mechanical properties in comparison with those of the Cu via when the 3D-FOWLP is deformed by heat.

참고문헌 (Reference)

1 노명훈, "열충격에 의한 3차원 패키징용 TSV의 Cu 돌출 거동" 대한금속·재료학회 52 (52): 459-465, 2014

2 이미경, "수치해석을 이용한 팬 아웃 웨이퍼 레벨 패키지의 휨 경향 및 신뢰성 연구" 한국마이크로전자및패키징학회 21 (21): 31-39, 2014

3 설희승, "대면적 패널 패키징의 휨 해석" 한국생산제조학회 28 (28): 203-209, 2019

4 Kan, K., "The Novel Liquid Molding Compound for Fan-out Wafer Level Package" IEEE 557-561, 2016

5 이행수, "TSV를 이용한 3차원 적층 패키지의 본딩 공정에 의한 휨 현상 및 응력 해석" 한국정밀공학회 29 (29): 563-571, 2012

6 Ko, J. Y., "Samsung Mass-produces Automotive D-RAM that Can Withstand Temperatures of 125 Degrees"

7 정훈선, "3차원 적층 반도체 패키지에서 TSV 구조의 열기계적 신뢰성 연구" 서울과학기술대학교 NID융합기술대학원 2014