RISS 학술연구정보서비스

검색
다국어 입력

http://chineseinput.net/에서 pinyin(병음)방식으로 중국어를 변환할 수 있습니다.

변환된 중국어를 복사하여 사용하시면 됩니다.

예시)
  • 中文 을 입력하시려면 zhongwen을 입력하시고 space를누르시면됩니다.
  • 北京 을 입력하시려면 beijing을 입력하시고 space를 누르시면 됩니다.
닫기
    인기검색어 순위 펼치기

    RISS 인기검색어

      Study on Bioplar and SCR-based ESD Protection Devices with High Robustness and Efficient Area using Floating Diffusion for High Voltage ICs

      한글로보기

      https://www.riss.kr/link?id=T14023790

      • 저자
      • 발행사항

        용인 : Graduate School Dankook University, 2016

      • 학위논문사항
      • 발행연도

        2016

      • 작성언어

        영어

      • DDC

        621.38152 판사항(22)

      • 발행국(도시)

        대한민국

      • 기타서명

        고전압 집적회로용 플로팅 영역을 삽입한 고감내 및 저면적 특성의 바이폴라와 SCR 기반 ESD 보호소자에 관한 연구

      • 형태사항

        xvii,144 p. : ill. ; 30 cm.

      • 일반주기명

        단국대학교 학위논문은 저작권에 의해 보호받습니다
        지도교수:구용서
        Includes bibliographical references : p.136-142

      • 소장기관
        • 단국대학교 율곡기념도서관(천안) 소장기관정보
        • 단국대학교 퇴계기념도서관(중앙도서관) 소장기관정보
      • 0

        상세조회
      • 0

        다운로드
      서지정보 열기
      • 내보내기
      • 내책장담기
      • 공유하기
      • 오류접수

      부가정보

      다국어 초록 (Multilingual Abstract)

      This thesis presents a bipolar junction transistor (BJT)-based electrostatic discharge (ESD) protection device and silicon-controlled rectifier (SCR)-based ESD protection device. Both NPN bipolar transistors and silicon controlled rectifier (SCR) structures are widely used as high-voltage ESD clamp protection devices due to its high current driving capability and small footprint characteristics. However, these devices are not suitable for high-voltage technology because of the latch-up issue and the high trigger voltage. In this thesis, therefore, we propose a BJT-based ESD protection device that has a high robustness, low on-resistance, and a small footprint characteristics for high-voltage applications. Also, the SCR-based ESD protection device has high robustness and area efficiency for 250 V applications. The BJT-based device was implemented by combining an SCR device with a BJT. The device was designed with three parameters, and its characteristics can be optimized by adjusting those parameters. Our proposed device was fabricated with a 0.18, µm 60 V Bipolar CMOS DMOS (BCD) process, and its characteristics were verified through transmission-line pulse (TLP) tests, DC breakdown voltage measurements, and ESD zapping tests. In addition, the stacked structure was designed by using a unit device to apply the 60 V applications. From the experimental results, the unit device has a trigger voltage of 29.4 V and a holding voltage of 22.4 V. The proposed device exhibited an extremely low on-resistance characteristic of about 0.5 ohm. In addition, most of the unit devices passed the human-body model (HBM) 8 kV and the machine model (MM) 800 V. In the case of the stacking device, the holding and trigger voltages increased linearly with the number of stacks; the three-stack device passed the HBM 8000 V at the board level. Therefore, the proposed device will provide high reliability for high-voltage applications. The SCR-based device was designed through a 1.0 µm DMOS Silicon-On-Insulator (SOI) process. The measurement result of the proposed SCR device showed that the device has high current drivability of 10A or higher, holding voltage of 250 V higher, and trigger voltage of 460 V, and it passed 8 kV HBM. The proposed SCR device is properly designed for the IC characteristics, and the device has more than 70% area reduction and more than four times high robustness compared to PMOS 19-stack device. Through these studies, the proposed devices are suitable for high voltage IC characteristics, and they have high robustness and area efficient characteristics.
      번역하기

      This thesis presents a bipolar junction transistor (BJT)-based electrostatic discharge (ESD) protection device and silicon-controlled rectifier (SCR)-based ESD protection device. Both NPN bipolar transistors and silicon controlled rectifier (SCR) stru...

      This thesis presents a bipolar junction transistor (BJT)-based electrostatic discharge (ESD) protection device and silicon-controlled rectifier (SCR)-based ESD protection device. Both NPN bipolar transistors and silicon controlled rectifier (SCR) structures are widely used as high-voltage ESD clamp protection devices due to its high current driving capability and small footprint characteristics. However, these devices are not suitable for high-voltage technology because of the latch-up issue and the high trigger voltage. In this thesis, therefore, we propose a BJT-based ESD protection device that has a high robustness, low on-resistance, and a small footprint characteristics for high-voltage applications. Also, the SCR-based ESD protection device has high robustness and area efficiency for 250 V applications. The BJT-based device was implemented by combining an SCR device with a BJT. The device was designed with three parameters, and its characteristics can be optimized by adjusting those parameters. Our proposed device was fabricated with a 0.18, µm 60 V Bipolar CMOS DMOS (BCD) process, and its characteristics were verified through transmission-line pulse (TLP) tests, DC breakdown voltage measurements, and ESD zapping tests. In addition, the stacked structure was designed by using a unit device to apply the 60 V applications. From the experimental results, the unit device has a trigger voltage of 29.4 V and a holding voltage of 22.4 V. The proposed device exhibited an extremely low on-resistance characteristic of about 0.5 ohm. In addition, most of the unit devices passed the human-body model (HBM) 8 kV and the machine model (MM) 800 V. In the case of the stacking device, the holding and trigger voltages increased linearly with the number of stacks; the three-stack device passed the HBM 8000 V at the board level. Therefore, the proposed device will provide high reliability for high-voltage applications. The SCR-based device was designed through a 1.0 µm DMOS Silicon-On-Insulator (SOI) process. The measurement result of the proposed SCR device showed that the device has high current drivability of 10A or higher, holding voltage of 250 V higher, and trigger voltage of 460 V, and it passed 8 kV HBM. The proposed SCR device is properly designed for the IC characteristics, and the device has more than 70% area reduction and more than four times high robustness compared to PMOS 19-stack device. Through these studies, the proposed devices are suitable for high voltage IC characteristics, and they have high robustness and area efficient characteristics.

      더보기

      분석정보

      View

      상세정보조회

      0

      Usage

      원문다운로드

      0

      대출신청

      0

      복사신청

      0

      EDDS신청

      0

      동일 주제 내 활용도 TOP

      더보기

      주제

      연도별 연구동향

      연도별 활용동향

      연관논문

      연구자 네트워크맵

      공동연구자 (7)

      유사연구자 (20) 활용도상위20명

      이 자료와 함께 이용한 RISS 자료

      나만을 위한 추천자료

      해외이동버튼