1 "The VLSI Implementation of a Reed-Solomon Encoder Using Berlekamp's Bit-Serial Multiplier Algorithm" c-33 (c-33): 906-911, 1984
2 "The New RS Ecc Codec For Digital Audio and Video" 112-115, 1992.
3 "ROM used 2 to 3 error correcting BCH Decoder Improvement" 信學技報 AL 82-56 -56, 1982
4 "Operational Method and Apparatus over GF" 1993jul.13
5 "Error Control Coding" Prentice-Hall 240-261, 20044
6 "BCH coding and Reed-Solomon Coding theory" Daewoo Academic Press 1990
7 "Architecture for VLSI design of Reed-Solomon Decoders" 33 (33): -2, feb.1984.
8 "Anarea- efficient VLSI architecture of Reed-Solomon decoder/encoder for digital VCRs" 43 (43): nov.1997.
9 "2 Error Correcting RS Decoder design" 2004.
1 "The VLSI Implementation of a Reed-Solomon Encoder Using Berlekamp's Bit-Serial Multiplier Algorithm" c-33 (c-33): 906-911, 1984
2 "The New RS Ecc Codec For Digital Audio and Video" 112-115, 1992.
3 "ROM used 2 to 3 error correcting BCH Decoder Improvement" 信學技報 AL 82-56 -56, 1982
4 "Operational Method and Apparatus over GF" 1993jul.13
5 "Error Control Coding" Prentice-Hall 240-261, 20044
6 "BCH coding and Reed-Solomon Coding theory" Daewoo Academic Press 1990
7 "Architecture for VLSI design of Reed-Solomon Decoders" 33 (33): -2, feb.1984.
8 "Anarea- efficient VLSI architecture of Reed-Solomon decoder/encoder for digital VCRs" 43 (43): nov.1997.
9 "2 Error Correcting RS Decoder design" 2004.