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      고압 중수소 열처리에 의한 MOSFETs의 특성 개선에 대한 연구 = Improvement of Electrical Characteristics of MOSFETs Using High Pressure Deuterium Annealing

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      https://www.riss.kr/link?id=A108172287

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      High pressure deuterium (HPD) annealing is an advancing technology for the fabrication of modern semiconductor devices. In this work, gate-enclosed FETs are fabricated on a silicon substrate as test vehicles. After a cycle for the HPD annealing, the device parameters such as threshold voltage (V<sub>TH</sub>), subthreshold swing (SS), on-state current (I<sub>ON</sub>), off-state current (I<sub>OFF</sub>), and gate leakage (I<sub>G</sub>) were measured and compared depending on the HPD. The HPD annealing can passivate the dangling bonds at Si-SiO<sub>2</sub> interfaces as well as eliminate the bulk trap in SiO<sub>2</sub>. It can be concluded that adding the HPD annealing as a fabrication process is very effective in improving device reliability, performance, and variability.
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      High pressure deuterium (HPD) annealing is an advancing technology for the fabrication of modern semiconductor devices. In this work, gate-enclosed FETs are fabricated on a silicon substrate as test vehicles. After a cycle for the HPD annealing, the d...

      High pressure deuterium (HPD) annealing is an advancing technology for the fabrication of modern semiconductor devices. In this work, gate-enclosed FETs are fabricated on a silicon substrate as test vehicles. After a cycle for the HPD annealing, the device parameters such as threshold voltage (V<sub>TH</sub>), subthreshold swing (SS), on-state current (I<sub>ON</sub>), off-state current (I<sub>OFF</sub>), and gate leakage (I<sub>G</sub>) were measured and compared depending on the HPD. The HPD annealing can passivate the dangling bonds at Si-SiO<sub>2</sub> interfaces as well as eliminate the bulk trap in SiO<sub>2</sub>. It can be concluded that adding the HPD annealing as a fabrication process is very effective in improving device reliability, performance, and variability.

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