In this paper, we proposed and designed the lifting based hardware for high speed image processing. We designed optimized and simple lifting based filtering structure by applying parallelize the sub-miltiplication and optimize the operation algorihm. ...
In this paper, we proposed and designed the lifting based hardware for high speed image processing. We designed optimized and simple lifting based filtering structure by applying parallelize the sub-miltiplication and optimize the operation algorihm. Also, by applying NSE, we make small bit code and reduce the distortion while reorganize the input image to help DWT to operate fast.
An NSE method was applied to recover images that included minimum distortion from image data. The size of applied images was 256x256,and 100MHz clocks were applied on the Xilinx Vertex-1000 in the calculation performance verified by the applied simulation in which the processing speed was 300iis.