1 "Thorough testing of any multiport memory with linear tests" 21 : 217-231, 2002
2 "New fault models and efficient BIST algorithms for dual-port memories" 16 : 987-1000, 1997
3 "March tests for realistic faults in two-port memories" 73-78, 2000
4 "March SS: a test for all static simple RAM lts" 95-100, 2002
5 "Functional memory faults: a formal notation and a taxonomy" 281-289, 2000
6 "Fault models and tests for two-port memories" 401-410, 1998
7 "Efficient tests for realistic faults in dual-port SRAMs" 51 : 460-473, 2002
8 "An experimental analysis of spot defects in SRAMs: realistic fault models and tests" 131-138, 2000
9 "An efficient Test Methode for Embedded Multi-Port RAM With BIST circuitry" 62-67, 1995
10 "A New Test Evaluation Chip for Lower Cost Memory Tests Proceedings of IEEE Design and Test of Computers" 15-19, 1993
1 "Thorough testing of any multiport memory with linear tests" 21 : 217-231, 2002
2 "New fault models and efficient BIST algorithms for dual-port memories" 16 : 987-1000, 1997
3 "March tests for realistic faults in two-port memories" 73-78, 2000
4 "March SS: a test for all static simple RAM lts" 95-100, 2002
5 "Functional memory faults: a formal notation and a taxonomy" 281-289, 2000
6 "Fault models and tests for two-port memories" 401-410, 1998
7 "Efficient tests for realistic faults in dual-port SRAMs" 51 : 460-473, 2002
8 "An experimental analysis of spot defects in SRAMs: realistic fault models and tests" 131-138, 2000
9 "An efficient Test Methode for Embedded Multi-Port RAM With BIST circuitry" 62-67, 1995
10 "A New Test Evaluation Chip for Lower Cost Memory Tests Proceedings of IEEE Design and Test of Computers" 15-19, 1993