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- 저자 : 박주열(Joo-Yul Park) (검색결과 22 건)
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OpenCL을 활용한 CPU와 GPU 에서의 CMMB LDPC 복호기 병렬화
박주열,홍정현,정기석,Park, Joo-Yul,Hong, Jung-Hyun,Chung, Ki-Seok 대한임베디드공학회 2016 대한임베디드공학회논문지 Vol.11 No.6
Recently, Open Computing Language (OpenCL) has been proposed to provide a framework that supports heterogeneous computing platforms. By using an OpenCL framework, digital communication systems can support various protocols in a unified computing environment to achieve both high portability and high performance. This article introduces a parallel software decoder of Low Density Parity Check (LDPC) codes for China Multimedia Mobile Broadcasting (CMMB) on a heterogeneous platform. Each step of LDPC decoding has different parallelization characteristics. In this paper, steps suitable for task-level parallelization are executed on the CPU, and steps suitable for data-level parallelization are processed by the GPU. To improve the performance of the proposed OpenCL kernels for LDPC decoding operations, explicit thread scheduling, loop-unrolling, and effective data transfer techniques are applied. The proposed LDPC decoder achieves high performance by using heterogeneous multi-core processors on a unified computing framework.
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SNR 예측 정보 기반 적응형 Modified UMP-BP LDPC 복호기 설계
박주열,조걸,정기석,Park, Joo-Yul,Cho, Keol,Chung, Ki-Seok 대한임베디드공학회 2009 대한임베디드공학회논문지 Vol.4 No.4
As 4G mobile communication systems require high transmission rates with reliability, the need for efficient error correcting code is increasing. In this paper, a novel LDPC (Low Density Parity Check) decoder is introduced. The LDPC code is one of the most popular error correcting codes. In order to improve performance of the LDPC decoder, we use SNR (Signal-to-Noise Ratio) estimation results to adjust coefficients of modified UMP-BP (Uniformly Most Probable Belief Propagation) algorithm which is one of widely-used LDPC decoding algorithms. An advantage of Modified UMP-BP is that it is amenable to implement in hardware. We generate the optimal values by simulation for various SNRs and coefficients, and the values are stored in a look-up table. The proposed decoder decides coefficients of the modified UMP-BP based on SNR information. The simulation results show that the BER (Bit Error Rate) performance of the proposed LDPC decoder is better than an LDPC decoder using a conventional modified UMP-BP.
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과공정 Al-Si 합금의 초정 Si 미세조직변화에 미치는 P 첨가와 fading 시간의 영향
박주열 ( Joo Yul Park ),김억수 ( Eok Soo Kim ),이광학 ( Kwang Hak Lee ) 한국주조공학회 2004 한국주조공학회지 Vol.24 No.2
Mechanical property of hypereutectic Al-Si alloy is changed according to size and distribution of primary Si. Consequently, the study on the refinement for primary Si is progressed for a long time. But such effect of refinement comes out fading phenomena with the lapse of time. Therefore, this study investigated the optimum condition of primary Si refinement for hypereutectic Al-Si alloy. And we observed various primary Si size with P`s fading phenomena. The experiment results were as follows. For experiment of primary Si refinement, we made hypereutectic Al-Si alloy with various amounts of P addition. As a result of experiment, we obtained the fine microstructure at 0.01wt.%P. And the optimum condition of P addition, for reventing from growth of primary Si by P fading, is estimated 0.1wt.%P.
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메모리 사용을 최적화한 부분 병렬화 구조의 CMMB 표준지원 LDPC 복호기 설계
박주열(Joo-Yul Park),이소진(So-Jin Lee),정기석(Ki-Seok Chung),조성민(Seong-Min Cho),하진석(Jin-Seok Ha),송용호(Yong-Ho Song) 大韓電子工學會 2011 전자공학회논문지SD (Semiconductor and devices) Vol.48 No.1
본 논문에서는 CMMB (China Mobile Multimedia Broadcasting) 표준의 LDPC(Low Density Parity Check) 부호 복호기를 효과적으로 구현하는 방법을 제안한다. 본 논문은 AGU(Address Generation Unit)와 Index 행렬을 이용하여 효율적으로 주소 값을 생성함으로써, 메모리 사용량을 줄이고 복잡도를 감소시켰다. 또한 LDPC 부호 복호기의 throughput을 향상시키기 위해 한 클럭에 여러 메시지를 전달하는 부분 병렬 구조를 사용하였고, 하나의 주소를 사용하여 병렬적으로 동작이 가능하도록 노드 그룹핑을 진행하였다. 제안하는 LDPC 부호 복호기는 Verilog HDL로 구현하였으며, Synopsys사의 Design Compiler를 이용하여 Chartered 0.18㎛ CMOS cell library 공정으로 합성하였다. 제안된 복호기는 455K(in NAND2)의 크기를 가지며, 185MHz의 클럭에서 1/2 부호는 14.32 Mbps의 throughput을 갖고, 3/4 부호는 26.97Mbps의 throughput을 갖는다. 또한, 기존의 CMMB용 LDPC의 메모리와 비교하여 0.39% 의 메모리만 사용된다. In this paper, we propose a memory efficient multi-rate Low Density Parity Check (LDPC) decoder for China Mobile Multimedia Broadcasting (CMMB). We find the best trade-off between the performance and the circuit area by designing a partially parallel decoder which is capable of passing multiple messages in parallel. By designing an efficient address generation unit (AGU) with an index matrix, we could reduce both the amount of memory requirement and the complexity of computation. The proposed regular LDPC decoder was designed in Verilog HDL and was synthesized by Synopsys’ Design Compiler using Chartered 0.18㎛ CMOS cell library. The synthesized design has the gate size of 455K (in NAND2). For the two code rates supported by CMMB, the rate-1/2 decoder has a throughput of 14.32 Mbps, and the rate-3/4 decoder has a throughput of 26.97 Mbps. Compared with a conventional LDPC for CMMB, our proposed design requires only 0.39% of the memory.
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TMR 구조에서의 백업과 복원을 활용한 안정성 및 신뢰성 향상 임베디드 시스템 구현
박주열(Joo-Yul Park),이준환(Jun-Hwan Lee),김효상(Hyo-Sang Kim),김봉택(Bong-Taek Kim),정기석(Ki-Seok Chung) 한국철도학회 2011 한국철도학회 학술발표대회논문집 Vol.2011 No.10
The purpose of this paper is to explain the implementation method in order to enhance stability and reliability of embedded system. In this research Texas Instrument (TI)'s TMS570 MCU(Micro Controller Unit) is used to satisfy the standard of stability that is IEC 61508. IEC 61508 suggest SIL(Safety Integrity Level) from 1 to 4 and TMS570 is satisfied SIL3. Also TMS570 can provide several stability functions can be used in realtime system. To use such functions this paper suggest the solution about the defect that can be used in realtime system. In basic way TMR(Triple Modular Redundancy) suggested in addition to explain about the way to improve safety and reliability. Also this paper will suggest the method that reinforce the stability of calculation by using multiplex voter and memory.
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OpenMP를 이용한 철도신호에서의 LDPC 적용에 관한 연구
박주열(Park Joo-Yul),김효상(Kim Hyo-Sang),박태기(Park Tae-ki),김봉택(Kim Bong-Taek),정기석(Chung Ki-Seok) 한국철도학회 2009 한국철도학회 학술발표대회논문집 Vol.2009 No.11월
There have been lots of researches for High Performance Digital Signal Processing performance enhancement on a multi-core processor. These kinds of parallelizing can enable massive signal processing, so we can have advantage's of processing various of signal processing standards without additional DSP's or other accelerating hardwares. In this paper we introduce Low Density Parity Check(LDPC) which is one of the Foward Error Correction(FEC). And we have achieved computational time reduce by using OpenMP as a parallelizing scheme.
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