Multi-Level을 사용한 PDP 구동회로에서 Timing 변화에 따른 특성 변화에 관한 연구

김중수,노정욱,홍성수,사공석진 전력전자학회 2005 전력전자학회 논문지 Vol.10 No.6

제안된 Multi-level PDP sustain Driver는 기존 L. Webber에 의해 제안된 방식에 비해 낮은 전압 rating을 갖는 소자를 사용하며 sustain 전압파형의 rising/falling 구간이 각각 2번의 공진에 의해 이루어진다. 본 논문에서는 rising time을 구성하는 3단계(Tr1, Ti1, Tr2)의 변화에 따라 PDP의 방전 특성에 미치는 영향을 비교하고, 기존 LG전자의 상용화 제품인 42V6와 특성을 비교한다. 실험결과는 3단계의 rising time 중에 Ti1의 변화에 따른 특성 변화가 가장 크며, Tr2의 변화에 의한 영향도 있으며, Tr1의 변화에 따른 특성 변화는 거의 없다. 제안된 PDP driver는 Tr1이 60ns, Ti1이 120ns, Tr2가 350ns 인 경우, Full white display pattern에서 기존제품에 비해 휘도 14.6%증가, 소비전력 5.9%감소, panel 효율 24.2% 증가, module 효율 21.2%증가 등 특성을 얻을 수 있었다. 실제 PDP module 응용에 적합할 것으로 기대된다. The proposed Multi-level PDP sustain Driver is composed of the semiconductor devices with low voltage rating compared to those used in the prior circuit proposed by L. Webber, and it has two resonant periods during the charging (rising period) and discharging (falling period) the PDP in the sustaining voltage waveforms. In accordance with the change of timing phase(Tr1, Ti1, Tr2), the performance characteristics of a commercial PDP module has been carried out and compared the characteristic with the 42V6, made of LG Electronics co., Experimental results show that the performance characteristics of PDP module are greatly influenced by the variation of Ti1 and Tr2. The variation of Tr1 do not influence much on the performances of PDP. With the conditions that Tr1=60ns, Ti1=120ns, and Tr2=350ns, we could get the performances listed as the luminance is increased 14.6%, the power consumptions is decreased 5.9%, the panel efficiency is increased 24.2%, module efficiency is increased 21.2%, compared to those shown in the commercial PDP module (42V6). Therefore, the proposed multi-level PDP sustain driver expected to be suitable to actual PDP module application.

넓은 영전압 스위칭 범위를 갖는 대화면 PDP용 유지전원단을 위한 고효율 전력 변환회로

박경화,문건우 전력전자학회 2005 전력전자학회 논문지 Vol.10 No.6

Recently, due to the launch of digital broadcasting service, the demand of Flat Panel Display (FPD) is sharply rising. Among them, the PDP is expected to be one of the most promising digital displays of next generation because of its large screen size, high resolution, thinness and board field of view. Meanwhile, the PDP uses ADS (Address Display-period Separation) scheme which divide one subfield into address and sustaining period to express the grey scale of images. Since the output of sustaining power module is mostly used for sustaining period, the load of the sustaining power module can be considered as a pulsating load. Due to this particular load condition, if the wide ZVS range of the power switches is not guaranteed, the hard switching causes large amount of switching loss and serious thermal problem in power module.In this paper, a high efficiency power conversion circuit for 60" PDP sustaining power module which achieves wide ZVS range with the help of additional ZVS tank is proposed. According to the various gating methods, the different operations of the proposed converter are presented. And, to confirm the properties of the proposed converter, an experimental prototype of 900W power converter is constructed and tested. As a result, more than 92% of high efficiency is obtained at 10% load condition, and the ZVS operation is achieved from full load to 10% load condition. 최근 디지털 방송의 시행에 따라 평판디스플레이(FPD)의 수요가 증가하고 있다. 그 중에서도 PDP는 대화면, 고감도, 넓은 시야각, 얇은 두께 등의 장점을 가지기 때문에 다른 FPD 매체들에 비해 경쟁력이 있다. 그리고 최근 PDP 패널의 공정 간소화로 인해 PDP 패널의 제작 비용이 감소하는 추세에 있기 때문에 대화면용 PDP에 관심이 집중되고 있다. 따라서 본 논문에서는 넓은 영전압 스위칭 범위를 갖는 대화면용 PDP 유지전원단을 위한 고효율 전력 변환회로를 제안하고 여러 가지 구동 신호를 인가하여 제안된 회로의 동작을 분석하였다. 기존의 42" PDP는 낮은 부하조건에 대해서 ZVS가 이루어지지 않게 되는데 시간에 따라서 급격하게 변하는 PDP의 부하 특성 때문에 많은 열이 발생하게 된다. 그러나 제안된 60" PDP 회로의 경우, 부가적으로 ZVS를 위한 에너지를 공급해 줄 수 있는 회로를 달아주었기 때문에 넓은 ZVS 영역을 갖게 된다. 그리고 이러한 장점 때문에 스위칭 손실이 감소하여 기존의 컨버터에 비해서 높은 효율을 기대할 수 있을 뿐만 아니라 심각한 열 문제가 없이 안정적인 조건에서 동작하는 것이 가능해 진다.

PDP TV의 sustain/reset 구동전원 공급을 위한 1단방식의 역률보상형 AC-to-DC 컨버터

강필순,박진현,Kang, Feel-Soon,Park, Jin-Hyun 한국정보통신학회 2008 한국정보통신학회논문지 Vol.12 No.2

PDP TV의 전력 효율을 향상시키기 위해서는 PDP의 구동과정에서 발생하게 되는 불필요한 전력소모와 AC 입력으로부터 원하는 DC를 얻기 위한 과정 중에 발생하는 전력 소모를 최소화하여야 한다. 일반적인 PDP 구동을 위한 입력 전원단은 2단 구조의 역률 보상형 컨버터를 채용하고 있으며, PDP 구동시 전력소모가 가장 큰 서스테인 드라이버와 리셋 회로의 구동전원을 공급하기 위한 별도의 DC-to-DC 컨버터를 필요로 한다. 그러나 이러한 회로의 구현은 저가의 PDP를 요구하는 시장 상황에 유연하게 대처하는데 많은 어려움을 준다. 따라서 본 논문에서는 최소의 전력 변환단계를 가지도록 서스테인과 리셋 회로의 전원 공급이 가능한 1단방식의 역률보상형 AC-to-DC 컨버터를 제안한다. 제안하는 시스템은 1단방식의 입력전원부 구성을 통해 전력 변환단을 최소화하여 전력 변환 중에 발생하는 손실을 최소화하며, PDP 서스테인/리셋 드라이버의 구동전압을 직접 공급하는 형태로 구성하여 시스템 부피의 감소, 원가 절감을 이룰 수 있다. To improve the efficiency of PDP TV, it should minimize the power losses transpired during AC-to-DC power conversion and PDP driving process. Generally the input power supply for PDP driving employes a two-stage power factor corrected converter, and it needs additional DC-to-DC converters to supply driving power for reset circuit ed sustain driver, which has high power consumption. However, such a circuit configuration has a difficulty for the PDP market requires low cost. To alleviate this problem, a new circuit composition is presented. It integrates input power supply with reset and sustain driver in a single power stack The input power supply of the proposed circuit has a single-stage structure to minimize power conversion loss, and it directly supplies power to the sustain driver so as to reduce the system size and cost.

Low Cost Driving System for Plasma Display Panels by Eliminating Path Switches and Merging Power Switches

Lee, Dong-Myung,Hyun, Dong-Seok The Korean Institute of Power Electronics 2007 JOURNAL OF POWER ELECTRONICS Vol.7 No.4

Recently, plasma display panels (PDP) have become the most promising candidate in the market for large screen size flat panel displays. PDPs have many merits such as a fast display response time and wide viewing angle. However, there are still concerns about high cost because they require complex driving circuits composed of high power switching devices to generate various voltage waveforms for three operational modes of reset, scan, and sustain. Conventional PDP driving circuits use path switches for voltage separation and a scan switch to offer a scan voltage for reset and scan operations, respectively. In addition, there exist reset switches to initialize PDPs by regulating the wall charge conditions with ramp shaped pulses, which means the necessity of specific power devices for the reset operation. Because power for the plasma discharge accompanied by a large current is transferred to a panel via path switches, high power rating switches are used for path switches. Therefore, this paper proposes a novel low-cost PDP driving scheme achieved by not only eliminating path switches but also merging the function of reset switches into other switches used for sustain or scan operations. The simulated voltage waveforms of the proposed topology and experimental results implemented in a 42-inch panel to demonstrate the validity of using a new gate driver that merges the functions of power switches are presented.

New Dual Sustaining Driver Using Two Different Energy Recovery Circuits for Large-Sized Plasma Display Panels (PDPs)

Kang-Hyun Yi,Seong-Wook Choi,Gun-Woo Moon IEEE 2009 IEEE transactions on industrial electronics Vol.56 No.1

<P>A new dual sustaining driver using two different energy recovery circuits (ERCs) for large-sized plasma display panels (PDPs) is proposed. The proposed sustaining driver has two H-bridge inverters to be used in splitting a panel into two. Two ERCs are employed to compensate energy for charging or discharging the panel. When PDPs with the two divided panels are driven by the proposed driver, there are good uniformity in gas discharge and reduction of power consumption by the two different ERCs used in charging and discharging the panel. As results, the proposed sustaining driver has low conduction loss, diminished switching loss of all main power switches, and decrease of reactive power consumption for recovering energy. Moreover, production cost can be reduced because of the simplified ERC for discharging the panel and no additional driving circuits. To verify the operation of the proposed circuit, experimental results will be shown by using a 42-in panel.</P>

새로운 에너지 회수 방식을 채용한 고효율 PDP 구동 회로

한상규,이준영,문건우,윤명중,朴昌培,丁南聲,朴正泌 전력전자학회 2002 전력전자학회 논문지 Vol.7 No.2

A new high-efficient energy-recovery circuit is proposed to drive a plasma display panel (PDP) and compared with the conventional circuit. The proposed circuit uses only two inductors and no auxiliary circuit to recover the energy stored in the equivalent intrinsic capacitance of PDP. Therefore it features a simpler structure, less mass, lower cost of production, higher efficiency, and fewer power devices. The very stable and uniform light emitted from PDP proves the high quality of screen. It is suitable for wall-hanging color TVs. The proposed circuit, operating at 200kHz, is verified to be applicable on a 42-inch PDP by experimental results. 새로운 에너지 회수 방식을 채용한 고효율 PDP 구동회로가 제안된다. 제안된 에너지 회수 회로는 PDP의 등가 캐패시터에 저장된 에너지를 회수하기 위해서 종래의 에너지 회수 회로에서 부가되었던 별도의 보조 회로 없이 2개의 인덕터 만을 사용하므로 그 구조가 매우 간단하고 시스템 부피가 작으며 적은 수의 전력 소자만으로도 구현이 가능하므로 제작단가 절감효과를 얻을 수 있으며 높은 효율 등의 장점을 가지고 있다. 뿐만 아니라 PDP 화면에서 방사되는 광의 파형이 균일하고 안정적이므로 고화질을 보장하기도 한다. 제안된 회로의 유효성 검증을 위해 전 구간회로를 모두 갖춘 42인치 PDP를 스위칭 주파수 200kHz로 구동한 실험 결과를 제시하며, 본 논문에서 제안된 회로는 차세대 벽걸이형 컬러 TV에 매우 적합하게 적용될 수 있다.

High Frequency and High Luminance AC-PDP Sustaining Driver

Choi Seong-Wook,Han Sang-Kyoo,Moon Gun-Woo The Korean Institute of Power Electronics 2006 JOURNAL OF POWER ELECTRONICS Vol.6 No.1

Plasma display panels (PDPs) have a serious thermal problem, because the luminance efficiency of a conventional PDP is about 1.5 1m/W and it is less than $3\~5\;lm/W$ of a cathode ray tube (CRT). Thus there is a need for improving the luminance efficiency of the PDP. There are several approaches to improve the luminance efficiency of the PDP and we adopted a driving PDP at high frequency range from 400kHz up to over 700kHz. Since a PDP is regarded as an equivalent inherent capacitance, many types of sustaining drivers have been proposed and widely used to recover the energy stored in the PDP. However, these circuits have some drawbacks for driving PDPs at high frequency ranges. In this paper, we investigate the effect of the parasitic components on the PDP itself and on the driver when the reactive energy of the panel is recovered. Various drivers are classified and evaluated based on their suitability for high frequency drivers. Finally, a current-fed driver with a DC input voltage bias is proposed. This driver overcomes the effect of parasitic components in the panel and driver. It fully achieves a ZVS of all full-bridge switches and reduces the transition time of the panel polarity. It is tested to validate the high frequency sustaining driver and the experimental results are presented.

플라즈마 디스플레이의 기술과 현황

강정원,김영섭 한국반도체디스플레이기술학회 2004 반도체디스플레이기술학회지 Vol.3 No.4

21세기에 접어들면서 Digital시험방송의 시작과 다양한 Contents의 유입으로 평판디스플레이 (Flat Panel Display)에 관한 관심과 수요가 증가하고 있다. 이 중 PDP는 90년대 후반부터 양산 및 개발을 시작하여 현재는 40 inch에서 60 inch 화면 크기의 제품을 시장에서 구입할 수 있으며, 03년도에는 80 inch 크기의 Proto-type Model을 공개한 바 있다. PDP는 40 inch 이상의 대면적 구현이 용이하다는 점, CRT와 동등 수준의 화상 구현이 가능하다는 점, 제조공법이 간단하고 제조원가가 저렴하다는 점 등을 특징으로 시장을 확대하고 있으나, 좀 더 대중적인 디스플레이가 되기 위해서는 고휘도 및 고효율화, 화질개선 그리고 저가격화 등과 같은 과제를 해결하여야 한다. 본 논문에서는 PDP의 개발역사 및 시장현황, 구조 및 구동 방법 그리고 해결과제 및 전망에 대해서 포괄적으로 살펴보기로 한다.

High Frequency and High Luminance AC-PDP Sustaining Driver

최성욱,문건우,한상규 전력전자학회 2006 JOURNAL OF POWER ELECTRONICS Vol.6 No.1

Plasma display panels (PDPs) have a serious thermal problem, because the luminance efficiency of a conventional PDP is about 1.5 lm/W and it is less than 3~5 lm/W of a cathode ray tube (CRT). Thus there is a need for improving the luminance efficiency of the PDP. There are several approaches to improve the luminance efficiency of the PDP and we adopted a driving PDP at high frequency range from 400 kHz up to over 700 kHz. Since a PDP is regarded as an equivalent inherent capacitance, many types of sustaining drivers have been proposed and widely used to recover the energy stored in the PDP. However, these circuits have some drawbacks for driving PDPs at high frequency ranges. In this paper, we investigate the effect of the parasitic components on the PDP itself and on the driver when the reactive energy of the panel is recovered. Various drivers are classified and evaluated based on their suitability for high frequency drivers. Finally, a current-fed driver with a DC input voltage bias is proposed. This driver overcomes the effect of parasitic components in the panel and driver. It fully achieves a ZVS of all full-bridge switches and reduces the transition time of the panel polarity. It is tested to validate the high frequency sustaining driver and the experimental results are presented.

Low Cost Driving System for Plasma Display Panels by Eliminating Path Switches and Merging Power Switches

Dong-Myung Lee,Dong-Seok Hyun 전력전자학회 2007 JOURNAL OF POWER ELECTRONICS Vol.7 No.4

Recently, plasma display panels (PDP) have become the most promising candidate in the market for large screen size flat panel displays. PDPs have many merits such as a fast display response time and wide viewing angle. However, there are still concerns about high cost because they require complex driving circuits composed of high power switching devices to generate various voltage waveforms for three operational modes of reset, scan, and sustain. Conventional PDP driving circuits use path switches for voltage separation and a scan switch to offer a scan voltage for reset and scan operations, respectively. In addition, there exist reset switches to initialize PDPs by regulating the wall charge conditions with ramp shaped pulses, which means the necessity of specific power devices for the reset operation. Because power for the plasma discharge accompanied by a large current is transferred to a panel via path switches, high power rating switches are used for path switches. Therefore, this paper proposes a novel low-cost PDP driving scheme achieved by not only eliminating path switches but also merging the function of reset switches into other switches used for sustain or scan operations. The simulated voltage waveforms of the proposed topology and experimental results implemented in a 42-inch panel to demonstrate the validity of using a new gate driver that merges the functions of power switches are presented.