${\sum}-{\Delta}$ modulator의 구조를 갖는A/D 변환기 설계

윤정식,정정화 한국통신학회 2003 韓國通信學會論文誌 Vol.28 No.1C

본 논문에서는 2 Ms/s의 데이터 rate와 12-비트의 해상도를 갖는 Sigma-delta modulator의 구조를 제안한다. Sigma-delta modulator는 oversampling과 노이즈 shaping의 두 가지 특성으로 인해 낮은 해상도의 A/D 변환기와 결합하여 높은 해상도를 갖는 A/D 변환기의 구현이 가능하다는 장점으로 audio 응용 분야에 널리 사용되어 왔다. 그러나, Sigma-delta modulator를 무선 데이터 통신 등 다양한 응용 분야에서 사용하기 위해서는 좀더 높은 데이터 rate를 갖는 Sigma-delta modulator에 관한 연구가 필요하게 되었다. 본 논문에서 제안한 Sigma-delta modulator 구조는 기존의 64 내지 256의 oversampling비를 16으로 낮추어 sampling을 하여 기존의 수 십에서 수 백 Ks/s정도의 데이터 rate를 1 Ms/s 이상의 높은 데이터 rate에서 동작하도록 하였다. 그리고 두 개의 2차 Sigma-delta modulator를 Cascade 구조로 연결하고, 이득을 최적화하여 4차의 Sigma-delta modulator와 유사한 결과를 얻을 수 있었다. 내부에는 1-비트 A/D, D/A 변환기를 채용하여 부가적인 calibration 회로가 필요 없도록 하였다. This thesis proposes a sigma-delta modulator architecture with 2 Ms/s data rate and 12 bit resolution. A sigma-delta modulate has the features of oversampling and noise shaping. With these features, it can be connected with low resolution A/D converter to achieve higher resolution A/D converter. Most previous researches have been concentrated on high resolution but low data rate applications, e.g. audio applications. But, in order to be applied to various applications such as wireless data communication, researches on sigma-delta modulator architecture for higher data rate are required. The proposed sigma-delta modulator architecture has the sampling rate of 16 times Nyquist rate to achieve high data rate, and consists of a cascade of two 2nd order sigma-delta modulator to get relatively high resolution. The experimental result shows that the proposed architecture achieves 12-bit resolution at 2 Ms/s data rate.

A Ridge-type Silicon Waveguide Optical Modulator Based on Graphene and Black Phosphorus Heterojunction

Zhenglei Zhou,Jianhua Li,Desheng Yin,Xing Chen 한국광학회 2024 Current Optics and Photonics Vol.8 No.4

In this paper, an optical modulator based on monolayer graphene and triple-layer black phosphorus (BP) heterojunction in the optical communication band range is designed. The influences of geometric parameters, chemical potential, BP orientation and dispersion on the fundamental mode of this modulator were determined in detail by the finite-difference time-domain (FDTD) method. Using appropriate geometric parameter settings, the extinction ratio of this proposed modulator is 0.166 dB, while the modulator with a working length of 3 μm can realize a 0.498 dB modulation depth. The 3-dB bandwidth of this modulator could achieve up to 2.65 GHz with 27.23 fJ/bit energy consumption. The extinction ratio and bandwidth of the proposed modulator increased by 66% and 120.83%, respectively, compared to the monolayer graphene-based ridge-type waveguide modulator. Energy consumption was reduced by 97.28%, compared to a double-layer graphene-based modulator.

개선된 DWA 구조를 갖는 3차 3-비트 SC Sigma-Delta Modulator

김동균(Dong-gyun Kim),조성익(Seong Ik Cho) 大韓電子工學會 2011 電子工學會論文誌-SD (Semiconductor and devices) Vol.48 No.5

DEM(Dynamic Element Matching) 기법중의 하나인 DWA(Data Weighted Averaging)는 멀티비트 Sigma-Delta Modulator에서 피드백 DAC의 단위요소 커패시터 부정합으로 인한 비선형성을 제거하기 위하여 널리 이용된다. 본 논문에서는 기존 DWA 구조에서 적용된 클록 타이밍을 조정하여 양자화기 데이터 코드 출력을 Latch 하는 2<SUP>n</SUP> Register 블록을 2<SUP>n</SUP> S-Rlatch 블록으로 대체하여 MOS Tr.를 줄임과 더불어 여분의 클록을 제거하였고, n-bit 데이터 코드를 지연시키기 위해 사용되는 2개의 n-비트 Register 블록을 1개의 n-비트 Register 블록으로 감소시켰다. 개선된 DWA 구조를 이용하여 3차 3-비트 SC(Switched Capacitor) Sigma-Delta Modulator를 설계한 후, 입력 주파수 20㎑, 샘플링 주파수 2.56㎒에서 0.1% DAC 단위요소 커패시터 부정합을 갖도록 하여 시뮬레이션 한 결과 기존의 구조와 동일한 해상도를 얻을 수 있었고, 222개의 MOS Tr 수를 줄일 수 있었다. In multibit Sigma-Delta Modulator, one of the DEM(Dynamic Element Matching) techniques which is DWA(Data Weighted Averaging) is widely used to get rid of non-linearity caused by mismatching of capacitor that is unit element of feedback DAC. In this paper, by adjusting clock timing used in existing DWA architecture, 2<SUP>n</SUP> Register block used for output was replaced with 2<SUP>n</SUP> S-R latch block. As a result of this, MOS Tr. can be reduced and extra clock can also be removed. Moreover, two n-bit Register block used to delay n-bit data code is decreased to one n-bit Register. After designing the 3rd 3-bit SC(Switched Capacitor) Sigma-Delta Modulator by using the proposed DWA architecture, 0.1% of mismatching into unit element in input frequency 20 ㎑ and sampling frequency 2.56 ㎒. As a consequence of the simulation, It was able to get the same resolution as the existing architecture and was able to reduce the number of MOS Tr. by 222.

새로운 구조의 Tunable 4차 SC Bandpass Sigma-Delta 변조기

김재붕(Jae-Bung Kim),유남희(Nam-Hee Yoo),조성익(Seong-Ik Cho) 대한전기학회 2011 전기학회논문지 Vol.60 No.2

Tunable SC(Switched Capacitor) bandpass Σ-Δ(Sigma-Delta) modulator used in wireless system receiver occurs a signal attenuation according to tuning of center frequency in signal bandwidth. In this paper, tunable bandpass 4th order SC bandpass Σ-Δ modulator with novel structure is proposed for rejection of signal attenuation in signal bandwidth. The existing structure uses a ten variable coefficient values for rejection of signal reduction in the modulator. But the proposed structure only use a two variable coefficient values for rejection of signal attenuation in the modulator. Also, an adder and comparator is replaced with a comparator having 4 inputs in the modulator. Therefore, the existing structure has one more OP-AMP. The purposed modulator was designed in 0.18 ㎛ CMOS technology. The resolution of the modulator within 310 ㎑ bandwidth and 40 ㎒ sampling frequency under 6.67 ㎒, 10 ㎒ and 13.33 ㎒ intermediate frequency are over 10 bit.

재구성 전력증폭기용 혼합형 가변 전압 공급기의 설계

손혁수(Hyuk Su Son),김우영(Woo Young Kim),장주영(Joo Young Jang),이해진(Hae Jin Lee),오인열(Inn Yeal Oh),박철순(Chul Soon Park) 한국전자파학회 2012 한국전자파학회논문지 Vol.23 No.4

본 논문은 차세대 재구성 전력증폭기용을 위해서, 새로운 타입의 다중 모드 혼합형 전압 공급기를 제안한다. 이를 위한 핵심 회로인 스위칭 증폭기의 새로운 구조를 제안하였다. 혼합형 전압 공급기의 가장 중요한 성능 지표 중의 하나인 효율을 증가시키기 위해 멀티 스위칭 증폭기 구조를 이용하였고, 또한 다중 모드 구현을 위해서 멀티 스위칭 증폭기와 입력 신호 검출단을 이용하였다. 성능 비교를 위해서 기본 구조를 지닌 혼합형 가변 전압 공급기도 같이 설계되었으며, 새롭게 제안하는 구조 이외에는 모두 동일하게 설계하여 비교를 용이하도록 하였다. 설계된 혼합형 전압 공급기의 효율을 측정하기 위해 384 kHz/3.84 MHz/5 MHz 대역폭을 가지는 EDGE, WCDMA, LTE 신호를 적용하였다. EDGE를 적용한 효율은 85 %, WCDMA를 적용한 효율은 84 % 그리고 LTE를 적용한 효율은 79 %의 결과를 얻게 되었다. 이는 기본 구조보다 최대 9 %의 성능 향상을 얻었으며, 차세대 재구성 송신기인 다중 대역 및 다중 모드 송신기 구현에 적용 가능함을 입증한다. This paper presents new type of the hybrid supply modulator for the next reconfigurable transmitters. The efficiency of the hybrid supply modulator is one of the most important performance. For enhancement the efficiency, multi-switching structure in the hybrid supply modulator is employed. Additionally, input envelope signal sensing stage is employed for implementation multi-mode operation. To compare the performance of the proposed hybrid supply modulator, the conventional hybrid supply modulator is also designed. The measured efficiency of the proposed hybrid supply modulator is 85 %/84 %/79 % for EDGE/WCDMA/LTE signals which have 384 kHz/3.84 MHz/5 MHz bandwidth, respectively. The efficiency of the proposed hybrid supply modulator is higher than the conventional hybrid supply modulator. Therefore, this structure shows good candidate for the reconfigurable transmitters.

A Novel Approach for a Distributed TCM Modulator

Jorg Haarer,Nicolas Lomberg,Philipp Ziegler,Philipp Marx,Andre Haspel,Jorg Roth-Stielow 전력전자학회 2023 ICPE(ISPE)논문집 Vol.2023 No.-

Wide-band-gap semiconductor devices, higher switching frequencies enabled by zero-voltage switching techniques and higher integration, currently drive resource and cost savings in power electronics. The potential of integrated power stages, combining power transistor, gate driver, measurement and protection circuits, modulator and controller has been demonstrated for topologies with one switch. However, for topologies with more switches the integration of modulator and controller is problematic, as they are traditionally regarded as an atomic unit connected to all power transistors via potential barriers. This precludes the direct integration of modulator and controller. This paper presents a novel distributed triangular current mode modulator. It exploits the fact that all information, needed to generate the switching commands can be determined from state variables measured directly at the individual power transistors. Thus, modulator and controller can be integrated in universally applicable power stages, which allow high switching frequencies and soft switching.

A Ridge-type Silicon Waveguide Optical Modulator Based on Graphene and Black Phosphorus Heterojunction

Zhenglei Zhou,Jianhua Li,Desheng Yin,Xing Chen 한국광학회 2024 Current Optics and Photonics Vol.8 No.4

In this paper, an optical modulator based on monolayer graphene and triple-layer black phosphorus (BP) heterojunction in the optical communication band range is designed. The influences of geometric parameters, chemical potential, BP orientation and dispersion on the fundamental mode of this modulator were determined in detail by the finite-difference time-domain (FDTD) method. Using appropriate geometric parameter settings, the extinction ratio of this proposed modulator is 0.166 dB, while themodulator with a working length of 3 μm can realize a 0.498 dB modulation depth. The 3-dB bandwidthof this modulator could achieve up to 2.65 GHz with 27.23 fJ/bit energy consumption. The extinction ratio and bandwidth of the proposed modulator increased by 66% and 120.83%, respectively, compared to the monolayer graphene-based ridge-type waveguide modulator. Energy consumption was reduced by 97.28%, compared to a double-layer graphene-based modulator.

Scatter Correction Using a Primary Modulator for Dual Energy Digital Radiography: A Monte Carlo Simulation Study

조병두,이영진,Dae-Hong Kim,김희중 한국물리학회 2014 THE JOURNAL OF THE KOREAN PHYSICAL SOCIETY Vol.65 No.4

In conventional digital radiography (DR) using a dual energy subtraction technique, a significantfraction of the detected photons are scattered within the body, making up the scatter component. Scattered radiation can significantly deteriorate image quality in diagnostic X-ray imaging systems. Various methods of scatter correction, including both measurement- and non-measurement-basedmethods, have been proposed in the past. Both methods can reduce scatter artifacts in images. However, non-measurement-based methods require a homogeneous object and have insufficient scattercomponent correction. Therefore, we employed a measurement-based method to correct forthe scatter component of inhomogeneous objects from dual energy DR (DEDR) images. We performeda simulation study using a Monte Carlo simulation with a primary modulator, which is ameasurement-based method for the DEDR system. The primary modulator, which has a checkerboardpattern, was used to modulate the primary radiation. Cylindrical phantoms of variable sizewere used to quantify the imaging performance. For scatter estimates, we used discrete Fouriertransform filtering, e.g., a Gaussian low-high pass filter with a cut-off frequency. The primarymodulation method was evaluated using a cylindrical phantom in the DEDR system. The scattercomponents were accurately removed using a primary modulator. When the results acquired withscatter correction and without scatter correction were compared, the average contrast-to-noise ratio(CNR) with the correction was 1.35 times higher than that obtained without the correction, and theaverage root mean square error (RMSE) with the correction was 38.00% better than that withoutthe correction. In the subtraction study, the average CNR with the correction was 2.04 (aluminumsubtraction) and 1.38 (polymethyl methacrylate (PMMA) subtraction) times higher than that obtainedwithout the correction. The analysis demonstrated the accuracy of the scatter correctionand the improvement of image quality that could be obtained by using a primary modulator andshowed the feasibility of introducing the primary modulation technique into dual energy subtraction. Therefore, we suggest that the scatter correction method with a primary modulator will beuseful for use with the DEDR system.

A High Data Rate, High Output Power 60 GHz OOK Modulator in 90 nm CMOS

Byeon, Chul Woo,Park, Chul Soon The Institute of Electronics and Information Engin 2017 Journal of semiconductor technology and science Vol.17 No.3

In this paper, we present a 60 GHz on-off keying (OOK) modulator in a 90 nm CMOS. The modulator employs a current-reuse technique and a switching modulation for low DC power dissipation, high on/off isolation, and high data rate. The measured gain of the modulator, on/off isolation, and output 1-dB compression point is 9.1 dB, 24.3 dB, and 5.1 dBm, respectively, at 60 GHz. The modulator consumes power consumption of 18 mW, and is capable of handling data rates of 8 Gb/s at bit error rate of less than $10^{-6}$ for $231^{-1}$ PRBS over a distance of 10-cm with an OOK receiver module.

A High Data Rate, High Output Power 60 GHz OOK Modulator in 90 nm CMOS

변철우,박철순 대한전자공학회 2017 Journal of semiconductor technology and science Vol.17 No.3

In this paper, we present a 60 GHz on-off keying (OOK) modulator in a 90 nm CMOS. The modulator employs a current-reuse technique and a switching modulation for low DC power dissipation, high on/off isolation, and high data rate. The measured gain of the modulator, on/off isolation, and output 1-dB compression point is 9.1 dB, 24.3 dB, and 5.1 dBm, respectively, at 60 GHz. The modulator consumes power consumption of 18 mW, and is capable of handling data rates of 8 Gb/s at bit error rate of less than 10-6 for 231-1 PRBS over a distance of 10-cm with an OOK receiver module.