Analysis and Compensation Control of Dead-Time Effect on Space Vector PWM

Jie Shi,Shihua Li 전력전자학회 2015 JOURNAL OF POWER ELECTRONICS Vol.15 No.2

Dead-time element must be set into space vector pulsed width modulation signals to avoid short circuits of the inverter. However, the dead-time element distorts the output voltage vector, which deteriorates the performance of electrical machine drive system. In this paper, dead-time effect and its compensation control strategy are analyzed. Based on the analysis, the voltage distortion caused by dead-time is regarded as two disturbances imposed on dq axes in the rotor reference frame, which degenerates the current tracking performance. To inhibit the adverse effect caused by the dead-time, a control scheme using two linear extended state observers is proposed. This method provides a strong ability to suppress dead-time effects. Simulations and experiments are conducted on a permanent magnet synchronous motor drive system to demonstrate the effectiveness of the proposed method.

A Simple and Direct Dead-Time Effect Compensation Scheme in PWM-VSI

Dong-Hee Lee,Jin-Woo Ahn IEEE 2014 IEEE transactions on industry applications Vol.50 No.5

<P>This paper presents the direct compensation of the switching interval error of the effective voltage vectors by the dead time of a pulsewidth modulation voltage source inverter (PWM-VSI). The output voltages of a three-phase PWM-VSI are distorted and have voltage errors from the dead time to avoid the shoot-through of inverter arms and the time delay of the gate drive. Voltage distortion increases the harmonics of the output voltages and decreases control performance. This paper presents a simple and direct compensation technique to solve this problem in a three-phase VSI. The practical switching output voltages are determined by the dc-link voltage, the switching signals of each phase, the dead time, the time delay, and the current polarities of each phase. For these reasons, output voltage errors are not constant. In order to analyze the dead-time effect in the actual switching voltages of each phase, the practical switching voltages in a sampling period of a space vector PWM (SVPWM) method are calculated according to the current polarity. In the calculation, the dead time, the time delay of devices, and the voltage drops on power devices are included to consider nonlinear voltage distortion. From these practical switching voltages during the switching intervals in a sampling period, the average output voltages of each phase can be derived, and the output voltage errors between the voltage commands and the average output voltages of each phase are obtained. The SVPWM switching intervals of each phase can be derived by the average output voltages that are calculated according to the current polarity and nonlinear voltage distortion to compensate for the output voltage errors. With the simple detection of the current polarity, the practical errors of the switching intervals of each phase can be compensated by the addition of the compensated switching time. Simulation and experimental results validating the proposed compensation method are presented in this paper.</P>

Analysis and Compensation Control of Dead-Time Effect on Space Vector PWM

Shi, Jie,Li, Shihua The Korean Institute of Power Electronics 2015 JOURNAL OF POWER ELECTRONICS Vol.15 No.2

Dead-time element must be set into space vector pulsed width modulation signals to avoid short circuits of the inverter. However, the dead-time element distorts the output voltage vector, which deteriorates the performance of electrical machine drive system. In this paper, dead-time effect and its compensation control strategy are analyzed. Based on the analysis, the voltage distortion caused by dead-time is regarded as two disturbances imposed on dq axes in the rotor reference frame, which degenerates the current tracking performance. To inhibit the adverse effect caused by the dead-time, a control scheme using two linear extended state observers is proposed. This method provides a strong ability to suppress dead-time effects. Simulations and experiments are conducted on a permanent magnet synchronous motor drive system to demonstrate the effectiveness of the proposed method.

Novel Dead-time Segmented Compensation Strategy for a Wide Impedance Angle Range in a Three-phase Inverter with a Resistance-Inductance Load

Zhang Siyan,Wang Xudong,Ma Junjie,Duan Ruizhen,Zhou Kai 대한전기학회 2022 Journal of Electrical Engineering & Technology Vol.17 No.4

The dead-time setting in space vector pulse width modulation (SVPWM) causes inverter output waveform distortion and performance degradation. This paper proposes a novel dead-time segmented compensation strategy for a wide impedance angle range in a three-phase inverter with a resistance-inductance load. Since the load impedance angle ( φ ) of the threephase inverter produces diff erent dead-time eff ects, in this paper, it is divided into two intervals of [0 30°] and [30° 90°] and a corresponding dead-time segmented compensation strategy is proposed, which solves the limitation of the traditional time compensation scheme that analyzes only the resistive load. In addition, this paper uses the conversion relationship between the power factor ( λ ) and φ to determine the current polarity of each sector in the vector space, which avoids the detection error of the current zero-crossing point in the traditional compensation scheme. The simulation and experimental results demonstrate that this method eff ectively reduces the total harmonic distortion (THD) of the inverter output current signal by approximately 30% and is easy to program, which improves the inverter output performance.

온라인 전향 데드타임 보상기법

김현수,윤명중 전력전자학회 2004 전력전자학회 논문지 Vol.9 No.3

In this paper, a new on-line dead-time compensation method is proposed. The output voltage errors due to the dead-time effect is considered as disturbance voltages. The magnitude of the disturbance voltages is estimated using a time delay control technique and the disturbance voltages are calculated using the estimated values, measured currents, and position information. The calculated disturbance voltages are fed to voltage references in order to compensate the dead-time effect. The proposed method is applied to a PM synchronous motor drive system and implemented in a digital manner using a digital signal processor (DSP) TMS320C31. The experiments are carried out for this system to show the effectiveness of the proposed method and the results show the validity of the proposed method. 본 논문에서는 새로운 온라인 데드타임 전향보상기법을 제안한다. 데드타임 효과(dead-time effect)로 인한 출력전압 오차를 외란전압으로 간주하고 이를 추정하여 전향보상한다. 외란전압의 크기를 시간지연제어기법을 이용하여 추정하고, 추정된 값과 측정된 전류와 위치 정보로써 외란전압을 계산한다. 데드타임 효과를 보상하기위해 계산된 외란전압은 전압지령에 전향된다. 제안된 방법은 DSP TMS320C31을 사용하여 디지털방식으로 영구자석 동기전동기 구동 시스템에 적용이 된다. 제안된 방법의 효용성을 검증하기위해 이 시스템에서 실험을 수행하였고 그 결과는 제안된 방법의 효과를 잘 보여주고 있다.

A Novel Dead-Time Compensation Method using Disturbance Observer

Youn, Myung-Joong,Moon, Hyung-Tae,Kim, Hyun-Soo The Korean Institute of Power Electronics 2002 JOURNAL OF POWER ELECTRONICS Vol.2 No.1

A new on-line dead-time compensation method for a permanent magnet (PM) synchronous motor drive is proposed. Using a simple disturbance observer without any additional circuit and off-line experimental measurement, disturbance voltages in the synchronous reference dq frame caused by the dead time and non-ideal switching characteristics of power devices are estimated in an on-line manner and fed to voltage references in order to compensate the dead-time effects. The proposed method is applied to a PM synchronous motor drive system and implemented by using software of a digital signal processor (DSP) TMS320C31. Simulations and experiments are carried out for this system and the results well demonstrate the effectiveness of the proposed method.

MRAC 기법과 좌표변환을 이용한 PWM 인버터 구동 PMSM의 데드타임 보상기법

김경화(Kyeong-Hwa Kim) 한국조명·전기설비학회 2012 조명·전기설비학회논문지 Vol.26 No.1

A simple and effective dead time compensation scheme for a PWM inverter-fed permanent magnet synchronous motor (PMSM) drive using the model reference adaptive control (MRAC) and coordinate transformation is presented. The basic concept is to first transform a time-varying disturbance caused by the dead time and inverter nonlinearity into unknown constant or slowly-varying one by the coordinate transformation, and then use the MRAC design technique to estimate this parameter in the stationary reference frame. Since the MRAC scheme is a suitable way of estimating such a parameter, the control performance can be significantly improved as compared with the conventional observer-based method tracking time-varying parameters. In the proposed scheme, the disturbance voltage caused by the dead time is effectively estimated and compensated by on-line basis without any additional circuits nor existing disadvantages as in the conventional methods. The asymptotic stability is proved and the effectiveness of the proposed scheme is verified.

A Compensation Method of Dead-Time and Forward Voltage Drop for Inverter Operating at Low Frequency

Lingyun Zhao,Wenxiang Song,Jiuyi Feng 대한전기학회 2019 Journal of Electrical Engineering & Technology Vol.14 No.2

The dead-time is introduced to prevent the upper and lower power devices of the same leg from conducting simultaneously. However, it will cause the actual output voltage deviate from the desired voltage and the load current distortion will occur, which is especially unexpected when the inverter operates at a low frequency. In addition, a voltage drop is produced when the current fl ows through the power device, which further aggravates the current distortion. This paper presents a simple compensation strategy for the dead-time and the forward voltage drop. The current polarity is obtained accurately by fi ltering the three-phase currents in the synchronous rotating coordinate. The driving signals in the SVPWM is adjusted according to the current polarity to compensate the dead-time. The forward voltage drops are equivalent to an error voltage vector by using the approximate average threshold voltage and average diff erential resistance model, which is added to the given voltage to suppress the eff ects of the forward voltage drops. The compensation quantities are set to change based on a piece wise linear function to eliminate the occurrence of the current clamp and the instantaneous zero-crossing switch. Finally, the proposed compensation strategy is verifi ed by the simulation and experiment.

전기적 부하 시험 장치를 위한 데드타임 및 유도성 전압강하 보상 기법이 적용된 가상자속 추정 기법에 관한 연구

박일우(Il-Woo Park),김태규(Tae-Kyu Kim),안호균(Gyun-Ho Ahn),박승규(Seung-Kyu Park) 대한전기학회 2019 전기학회논문지 Vol.68 No.7

This paper presents improved SOGI-FLL method to test the load of electric test equipment composed of two inverters. The simulator makes variable magnitudes and frequency of the voltage and EUT have output voltage sensor-less function for synchronous of simulator voltage by SOGI-FLL. The proposed SOGI-FLL have an additional reactance voltage drop compensation and dead-time compensation. The EUT has harmonics of the voltage generated in the current flowing through the filter due to the dead time. When the output voltage of the EUT(Equipment Under Test), which is a signal input to the SOGI filter, is very small and is distorted, the frequency estimation characteristic is degraded. To improve this, the dead time voltage is compensated for the command voltage depending on the output current direction of the test equipment. In addition, when the output voltage of the simulator is small and large current flows to the EUT, the SOGI input signal becomes small, which causes problems in frequency estimation. Thereby improving the frequency estimation characteristic by compensating the voltage drop of the filter. Electrical test equipment simulating motor load has variable voltage, frequency and current. The proposed method was simulated and tested to improve the properties of SOGI-FLL for electrical load testing.

Simplified design of proportional-integral-derivative (PID) controller to give a time domain specification for high order processes

Rodrigue Tchamna,이문용 한국화학공학회 2017 Korean Journal of Chemical Engineering Vol.34 No.4

An efficient simplified method is proposed for the time domain design of industrial proportional-integralderivative (PID) controllers and lead-lag compensators for high order single input single output (SISO) systems. The proposed analytical method requires no trial error steps for a lead-lag compensator design in the time domain by using the root-locus method. A practical PID controller design method was obtained based on the corresponding lead-lag compensator to give a required time-domain specification. Simulation studies were carried out to illustrate the control performance of the controllers by the proposed method. The proposed PID controller and lead-lag compensator directly satisfied time domain control specifications such as damping ratio, maximum overshoot, settling time and steady sate error without trial and error steps. The suggested algorithm can easily be integrated with a toolbox in commercial software such as Matlab.