LTPS TFT LCD 패널의 광 센서를 위한 dual slope 보정 회로

우두형(Doo Hyung Woo) 대한전자공학회 2009 電子工學會論文誌-SD (Semiconductor and devices) Vol.46 No.6

휴대용 기기의 소비 전력을 낮추고 영상의 질을 개선하기 위해, 주변 밝기에 따라서 LCD 모듈의 백라이트를 조정하는 방법을 사용할 수 있다. 이를 효과적으로 구현하기 위해서 LCD 패널에 광 센서와 신호취득 회로를 집적하고자 했으며, LTPS TFT 공정을 이용하여 설계했다. 서로 다른 LCD 패널의 광 센서에 대한 특성 편차를 보정하기 위해 새로운 개념의 start-up 보정 방식을 제안하였다. 이와 더불어 광 전류 정보를 디지털 형태로 전달하기 위해 time-to-digital 방식을 사용하였으며, 이를 start-up 보정 방식과 효과적으로 결합하는 dual slope 보정 방법을 제안하였다. LTPS TFT 공정을 이용하여 최종적인 신호취득 회로를 구현하고자, 간단하고 안정적인 회로 구조와 타이밍을 제안하고 설계 및 검증을 진행했다. 설계한 신호취득 회로는 별도의 검사 설비 없이 광 센서 편차의 보정이 가능하며, 60㏈ 범위의 입력 광에 대해 10배수 구간 마다 4 단계의 디지털 데이터를 출력한다. 신호취득 속도는 100㎐이며, 디지털 변환의 선형 오차는 18% 미만이다. To improve the image quality and lower the power consumption of the mobile applications, it is the one of the best candidate to control the backlight unit of the LCD module with ambient light. Ambient light sensor and readout circuit were integrated in LCD panel for the mobile applications, and we designed them with LTPS TFT. We proposed noble start-up correction in order to correct the variation of the photo sensors in each panel. We used time-to-digital method for converting photo current to digital data. To effectively merge time-to-digital method with start-up correction, we proposed noble dual slope correction method. The entire readout circuit was designed and estimated with LTPS TFT process. The readout circuit has very simple and stable structure and timing, so it is suitable for LTPS TFT process. The readout circuit can correct the variation of the photo sensors without an additional equipment, and it outputs the 4-levels digital data per decade for input luminance that has a dynamic range of 60㏈. The readout rate is 100 times/sec, and the linearity error for digital conversion is less than 18%.

LTPO 소자의 머신 러닝 모델 개발

이종환,은정수,안진수,이민석,곽우석 한국반도체디스플레이기술학회 2023 반도체디스플레이기술학회지 Vol.22 No.4

We propose the modeling methodology of CMOS inverter made of LTPO TFT using a machine learning. LTPO can achieve advantages of LTPS TFT with high electron mobility as a driving TFT and IGZO TFT with low off-current as a switching TFT. However, since the unified model of both LTPS and IGZO TFTs is still lacking, it is necessary to develop a SPICE-compatible compact model to simulate the LTPO current-voltage characteristics. In this work, a generic framework for combining the existing formula of I-V characteristics with artificial neural network is presented. The weight and bias values of ANN for LTPS and IGZO TFTs is obtained and implemented into PSPICE circuit simulator to predict CMOS inverter. This methodology enables efficient modeling for predicting LTPO TFT circuit characteristics.

LTPS TFT의 Vth와 mobility 편차를 보상하기 위한 AMOLED 화소 회로

우두형(Doo Hyung Woo) 대한전자공학회 2009 電子工學會論文誌-SD (Semiconductor and devices) Vol.46 No.4

본 연구를 통해서 대 면적, 고 휘도 AMOLED 응용에 적합한 화소 회로와 이에 대한 구동 방식을 제안하였다. 균일도는 다소 떨어지지만 안정성이 뛰어난 저온 다결정 실리콘(LTPS) 박막 트랜지스터(TFT)를 기반으로 설계했다. 영상 화소의 균일도를 향상시키기 위해, 화소 TFT의 VTH와 이동도 편차를 함께 보상할 수 있도록 했다. 기존의 이동도 보상 회로가 갖는 문제점을 극복하여 대 면적 패널에 적합하도록 했고, 동영상 특성을 개선하기 위해 black data insertion 방식을 도입하였다. 이동도 보상 시 휘도가 떨어지는 문제를 개선하기 위해, 패널이 두 가지 보상 모드에서 동작할 수 있도록 하였다. 화소 회로를 제어하기 위한 스캔 구동 회로를 최적화하여, 이를 통해서 보정 모드를 쉽게 제어할 수 있었다. 최종 구동 타이밍은 여유 있는 마진으로 안정적인 동작이 가능하다. 14.1“ WXGA top emission AMOLED 패널에 대해 설계했으며, 이동도 보상 시간을 1㎲로 했을 때 패널의 불균일도는 5% 이하로 예측되었다. We proposed a new pixel circuit and driving method for the large-area, high-luminance AMOLED applications in this study. We designed with the low-temperature poly-silicon(LTPS) thin film transistors(TFTs) that has poor uniformity but stable characteristic. To improve the uniformity of an image, the threshold voltage(VTH) and the mobility of the TFTs can be compensated together. The proposed method overcomes the previous methods for mobility compensation, and that is profitable for large-area applications. Black data insertion was introduced to improve the characteristics for moving images. AMOLED panel can operate in two compensation mode, so the luminance degradation by mobility compensation can be released. The scan driver for controlling the pixel circuits were optimized, and the compensation mode can be controlled simply by that. Final driving signal has large timing margin, and the panel operates stably. The pixel circuit was designed for 14.1" WXGA top-emission AMOLED panel. The non-uniformity of the designed panel was estimated under 5% for the mobility compensation time of 1㎲.

고 개구율 화소보상회로를 갖는 저전력 LTPS AMOLED 패널 설계

강홍석(Hong Seok Kang),우두형(Doo Hyung Woo) 大韓電子工學會 2010 電子工學會論文誌-SD (Semiconductor and devices) Vol.47 No.10

본 연구를 통해서 대 면적, 저 전력 AMOLED 응용에 적합한 고 개구율 픽셀 보상회로와 이에 대한 구동회로를 제안하였다. 균일도는 다소 떨어지지만 안정성과 이동도가 뛰어난 저온 다결정 실리콘(LTPS) 박막 트랜지스터(TFT)를 기반으로 설계했다. 픽셀의 불량률을 낮추고 배면발광방식에 적합하도록 픽셀 보상회로를 보다 간단하게 개선하여 고 개구율 특성을 갖도록했다. 제안하는 고 개구율 픽셀 보상회로는 일반적인 구동방식을 사용할 경우 명암비에서 큰 손해를 볼 수가 있으므로, 명암비를 높게 유지하기 위한 구동방식 및 구동회로를 제안하여 검증하였다. 이와 더불어 동영상 특성을 개선하기 위해 black data insertion 방식을 구현할 수 있도록 설계했다. 배면발광방식의 19.6" WXGA AMOLED 패널에 대해 설계했으며, 픽셀의 평균 개구율은 41.9%로 기존에 비해 8.9% 증가했다. TFT의 V<SUB>TH</SUB> 편차가 ±0.2V일 때, 패널의 불균일도와 명암비는 각각 6% 이하와 10만:1 이상으로 예측되었다. We proposed the new pixel compensation circuit with high aperture ratio and the driving method for the large-area, low-power AMOLED applications in this study. We designed with the low-temperature poly-silicon(LTPS) thin film transistors(TFTs) that has poor uniformity but good mobility and stability. To lower the error rate of the pixel circuit and to improve the aperture ratio for bottom emission method, we simplified the pixel compensation circuit. Because the proposed pixel compensation circuit with high aperture ratio has very low contrast ratio for conventional driving methods, we proposed the new driving method and circuit for high contrast ratio. Black data insertion was introduced to improve the characteristics for moving images. The pixel circuit was designed for 19.6" WXGA bottom-emission AMOLED panel, and the average aperture ratio of the pixel circuit is improved from 33.0% to 41.9%. For the TFT's VTH variation of ±0.2V, the non-uniformity and contrast ratio of the designed panel was estimated under 6% and over 100000:1 respectively.

LTPS TFT를 사용한 화상처리용 SRAM 설계 방안

金炯玖,柳在熙 홍익대학교 과학기술연구소 2006 科學技術硏究論文集 Vol.17 No.-

Portable devices' display panel is getting smaller, lighter and more power-efficient by the large demands of users, image memory integration on display panel with poly Si is proposed. Despite low yield of poly Si process, poly Si is known as the most appropriate process for SRAM to make it better to implement the image memory integration. This paper presents how to model faulty SRAM cell with poly Si as well as SRAM circuits and their operations compared to CMOS. Also, the proposed fault tolerance study can play an important role in image processing system on panel implementation to be realized in the near future.

Effect of selectively passivated layer on foldable low temperature polycrystalline silicon thin film transistor characteristics under dynamic mechanical stress

Lee, Sang Myung,Yun, Ilgu Pergamon Press 2017 Microelectronics and reliability Vol.76 No.-

<P>For the next generation display, foldable display is one of the attractive candidates. However, the degradation effects due to the mechanical stress on the device are unavoidable. A strain due to the mechanical stress generates cracks on the thin film transistors (TFTs). In this case, if the methodology guiding cracks is applied in the fabrication process, the device reliability can be enhanced. In this paper, a crack guided layer followed by the device fabrication process is deposited on p-type low temperature polycrystalline silicon (LTPS) TFT. Statistical analysis is also used to analyze the crack guided layer effects. To apply a strain on the foldable LTPS TFTS, 5000 cycles of dynamic mechanical stress with tensile and perpendicular directions were applied with 2-mm bending radius. Based on the results, TFT reliability can be enhanced by controlled the crack position using the crack-guided passivation layer. (C) 2017 Elsevier Ltd. All rights reserved.</P>

저 전력 휴대용 디스플레이를 위한 패널 일체형 광 센서 시스템

우두형(Doo Hyung Woo) 대한전자공학회 2016 전자공학회논문지 Vol.53 No.11

Voltage Regulator using Low Temperature Poly Silicon Technology for TFT-LCD Panel

Takahiko Mizuno,Masahiro Yoshida,Shigeki Imai,Yasoji Suzuki,Shinichi Murata 대한전자공학회 2009 ITC-CSCC :International Technical Conference on Ci Vol.2009 No.7

In this paper, a voltage regulator which can be integrated on a LCD panel using LTPS-TFT is proposed. The new voltage regulator can be reduced the deviation rate of the reference voltage (α') depending on the load fluctuation because the new voltage regulator provides a reference voltage shifter (RVS). By utilizing this circuit configulation, the proposed regulator can be obtained a stable constant output voltage. To confirm some performances of the proposed voltage regulator, the circuit analysis is carried out by using Smart-SPICE. As this results, the regulation rate of the output voltage (α) of the proposed voltage regulator is improved about 50% in comparison with that of conventional circuit under the conditions that the supply voltage (VDD) is +15V, the frequency (f) with the load current of+0.5㎃±0.5㎃ is 250㎑.

Effect of LDD Structure on Electrical Properties of Polysilicon n-TFT Prepared by Metal-Induced Lateral Crystallization

Se Wan Son,Chang Woo Byun,Yong Woo Lee,Seung Jae Yun,주승기 대한금속·재료학회 2012 ELECTRONIC MATERIALS LETTERS Vol.8 No.3

It is known that MILC polysilicon thin-film transistors (TFTs) show excellent electrical properties except for a relatively high leakage current. In this work, a lightly doped drain structure (LDD) was prepared in an n-type MILC poly silicon TFT and the effect of the LDD length on the leakage current has been systematically investigated. It turned out that the LDD is mainly responsible for the low leakage current, and no more than 0.5 μm of the lightly doped region is necessary to lower the leakage current to less than 3 × 10−11A at VD = 10 V. No appreciable effect on the leakage current can be found by an LDS (lightly doped source) but an LDS length of more than 1.5 μm caused a reduction of the on-current to below 10−5 A, whereas the on-current is typically more than 10−4 A in a conventional MILC TFT.

Design of LTPS TFT Current Mode Multiplexer and MUX-based Logic Gates

정주영,홍문표 한국정보디스플레이학회 2008 Journal of information display Vol.9 No.3

With the aim of creating a high-quality display system with value-added functions, we designed a current mode multiplexer for LTPS TFT devices. The multiplexers had less than 1 volt logic swing, and speed improvement was evident compared with that of conventional CMOS architecture. We refined the multiplexer to achieve a more stable current steering operation. By using the versatility of the multiplexer, a new NAND/AND and NOR/OR logic gates were designed through the simple modification of signal connections. Two micron LTPS TFT parameters were used during the HSPICE simulation of the circuits.