http://chineseinput.net/에서 pinyin(병음)방식으로 중국어를 변환할 수 있습니다.
변환된 중국어를 복사하여 사용하시면 됩니다.
A Satellite Resource Allocation for Multi-Beam Satellite Communication System
Sagawa, Yuichi,Ohata, Kohei,Ueba, Masazumi 통신위성우주산업연구회 2003 Joint Conference on Satellite Communications Vol.2003 No.-
A multi-beam system is one solution for enlarging the communication capacity by re-using the limited system frequency band, but system resources should be allocated to each user considering the interferences from vicinity beams(users). In addition, in mobile satellite systems, the resource allocation must consider user mobility and the uneven user distribution in the system and each beam. In this paper, we analyze an FDMA based multi-beam satellite system resource allocation scheme that considers both inter-beam interference and user distribution in the system in controlling both forward link power and frequency simultaneously. We confirm that this scheme enhances system capacity relative to the CDMA system, which uses the entire system frequency band.
An Architecture of Group MODEM with Timesharing Processing for Satellite Communication Networks
Tanabe, Kazuhiro,Sagawa, Yuichi,Kobayashi, Kiyoshi,Ohata, Kohei,Ueba, Masazumi 통신위성우주산업연구회 2002 Joint Conference on Satellite Communications Vol.2002 No.-
A satellite communication system for a mesh type network must support many multi-point connections simultaneously, and allocate satellite channels with the required data rates to support each connection independently. The conventional approach is excessively expensive since it forces the earth station to have one single carrier modem for each connection. To eliminate this problem, we introduce the Multicarrier/Multirate Group MODEM for earth stations. This new MODEM is implemented as a single LSI chip. The current version supports up to 128 communication channels simultaneously, and the bandwidth of each communication channel can be set individually. This paper describes the architecture and processing method of the modem and proposes an algorithm that decreases buffer circuit so as to reduce circuit size. Performance evaluation results are shown.