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Flexible transparent heaters with heating films made of indium tin oxide nanoparticles.
Im, Kiju,Chol, Kyoungah,Kwak, Kiyeol,Kim, Jonghyun,Kim, Sangsig American Scientific Publishers 2013 Journal of Nanoscience and Nanotechnology Vol.13 No.5
<P>In this study, flexible transparent heaters with heating films made of indium tin oxide (ITO) are fabricated on plastic substrates. The optical transmittance of a representative flexible heater is above 90% in the visible and near infrared regions. The steady-state temperature is determined by the bias voltage and reaches about 180 degrees C at a bias voltage of 50 V. The heat-generating properties are nearly the same before and after the application of tensile strain. Furthermore, the defrosting ability is demonstrated using a block of dry-ice.</P>
임기주(Kiju Im),조경아(Kyoungah Cho),김상식(Sangsig Kim) 대한전기학회 2009 대한전기학회 학술대회 논문집 Vol.2009 No.11
유리기판 위에 ITO 나노입자를 스핀코팅법을 이용하여 박막을 형성한후, 열처리를 하여 ITO 나노입자 박막의 발열특성을 조사하였다. 초기 연저항이 186 ㏀ 인 ITO 박막은 400℃에서 5분간 열처리 한 후에는 면저항이 0.63 ㏀ 으로 감소하였으며, 20 V의 전압을 인가하였을 때 온도가 171 ℃ 까지 상승하였다.
성렬 맹,Kiju Im,Kyung-wan Park,Moon-gyu Jang,이성재,Tae-woong Kang,Won-ju Cho 한국물리학회 2003 THE JOURNAL OF THE KOREAN PHYSICAL SOCIETY Vol.42 No.III
The degradation of the carrier mobility in the channel region due to the high dopant scattering becomes a big issue in deca-nanometer MOSFET technology. Besides, the random locations of dopants cause serious threshold voltage variations in such small devices. Thus, fabrication of deca-nanometer size devices without channel doping is highly sought nowadays. In this paper we propose a novel fabrication method for ultra-thin SOI MOSFETs with plasma doping followed by excimer laser annealing as one of the promising candidates to achieve this goal.
A Simple Method for Nanostructure Engineering of Mesoporous Zinc Silicate Particles
Choi, Hoon,Um, Kiju,Im, Minyoung,Lee, Kangtaek American Chemical Society 2015 Chemistry of materials Vol.27 No.7
<P>We report a novel method to engineer a nanostructure of zinc silicate particles. In this method, a mixture of tetraethoxysilane, zinc acetate, and cetyltrimethylammonium chloride (CTAC) was reacted in water at 80 °C for ∼3 h, followed by calcination. This method produced mesoporous zinc silicate particles with a core–shell structure in which the core contained a mixed oxide of ZnO and SiO<SUB>2</SUB>, whereas the shell was pure SiO<SUB>2</SUB>. We found a faster formation of mixed oxide than pure SiO<SUB>2</SUB>, which is believed to be responsible for the core–shell structure. On the basis of this understanding, we engineered the nanostructure of the synthesized particles: (1) zinc oxide in the core was dissolved by citrate buffer to produce hollow mesoporous silica particles, and (2) a layer-by-layer deposition technique was used to grow mesoporous shells on the existing particles, producing multishell mesoporous particles with various morphologies. Using a nitrogen sorption method, the average pore diameter of mesoporous zinc silicate particles was found to be 3.4 nm, which is similar to the diameter of spherical CTAC micelles. We also tested the adsorption capacity of hollow mesoporous silica particles using water-soluble anionic (8-hydroxypyrene-1,3,6-trisulfonic acid trisodium salt) and cationic (rhodamine B) dyes, and we found a high adsorption capacity for the cationic dye but negligible adsorption for the anionic dye. Finally, we compared release profiles of rhodamine B from hollow mesoporous silica particles with different morphologies.</P><P><B>Graphic Abstract</B> <IMG SRC='http://pubs.acs.org/appl/literatum/publisher/achs/journals/content/cmatex/2015/cmatex.2015.27.issue-7/cm503768j/production/images/medium/cm-2014-03768j_0009.gif'></P><P><A href='http://pubs.acs.org/doi/suppl/10.1021/cm503768j'>ACS Electronic Supporting Info</A></P>
양경환(Yang, Kyungwhan),조경아(Cho, Kyoungah),임기주(Im, Kiju),김상식(Kim, Sangsig) 한국전기전자학회 2016 전기전자학회논문지 Vol.20 No.2
본 연구에서는 휴대용 온열기의 에너지 효율을 향상시키기 위하여 indium tin oxide (ITO) 나노입자 페이스트와 PDMS를 이용하여 PDMS/ITO 나노입자 박막 면상발열체를 제작하였고, ITO 나노입자 박막 면상발열체와 PDMS/ITO 나노입자 면상발열체의 온도 유지특성 및 소비전력량을 분석하였다. PDMS층의 낮은 열전도도로 PDMS/ITO 나노입자 박막 면상발열체의 온도유지시간이 ITO 나노입자 박막 면상발열체에 비해 1.5배 증가하였으며, 소비 전력량은 35% 절감되었다. In this study, we fabricate a high efficiency heater consisting of the indium tin oxide (ITO) nanoparticle (NP)-paste and polydimethylsiloxane (PDMS) and investigate the effect of PDMS on temperature maintenance of the heater through the comparison with the PDMS-free ITO film heater. Compared to the ITO film heater, the temperature of the PDMS/ITO film heater lasts 1.5 times longer. And the power consumption of the PDMS/ITO film heater is reduced by 35%, owing to the low thermal conductivity of the PDMS layer.
Jong-Heon Yang,Jihun Oh,Kiju Im,Kyoungwan Park,Seongjae Lee,Won-ju Cho 한국물리학회 2004 THE JOURNAL OF THE KOREAN PHYSICAL SOCIETY Vol.44 No.2
Defect-free ultra-shallow junction (USJ) formation methods were investigated for sub-50-nm gatelength SOI MOSFET applications by using phosphorus solid-phase diusion (SPD) and plasma doping (PLAD). NMOSFETs with a gate length of 50-nm and n+-p junction diodes were successfully fabricated on SOI substrates. Defect-free n+-p junctions with extremely shallow junction depth and low sheet resistance were achieved by using SPD. Moreover, the SPD process generated no crystal defects, which are unavoidable in the ion implantation process and are a primary source of junction leakage currents. The electrical characteristics of n+-p junction diodes fabricated using SPD were superior to those fabricated using PLAD, and the SOI NMOSFET with its source/drain extension doped by using SPD showed good short-channel performance. These results demonstrate that solid-phase diusion can be promising candidate for sub-50-nm MOSFET technologies.
Fabrication and Process Simulation of SOI MOSFETs with a 30-nm Gate Length
Won-ju Cho,Jihoon Oh,Jong-heon Yang,Kiju Im,Kyoungwan Park,이성재 한국물리학회 2003 THE JOURNAL OF THE KOREAN PHYSICAL SOCIETY Vol.43 No.51
We have obtained systematic simulation and experimental results for 30-nm-gate-length metaloxide- semiconductor eld-eect transistor (MOSFET) fabricated on ultra-thin silicon-on-insulator (SOI) substrates. The two-dimensional process simulation and the device simulation were carried out to optimize the fabrication process conditions and the device characteristics of 30-nm-gatelength SOI MOSFETs. A new simple source/drain formation technique using the solid-phase diffusion (SPD) method was developed. Based on the simulation results and the SPD ultra-shallow junction formation technique, we successfully fabricated 30-nm-gate-length SOI nMOSFETs. The experimental results for the 30-nm-gate-length SOI nMOSFETs showed good transistor behaviors and superior device scalability.
김기동(Ki Dong Kim),권재근(Jae Geun Kwon),손임현(Im Hyeon Son),강기주(Kiju Kang) 대한기계학회 2021 大韓機械學會論文集A Vol.45 No.3
Shellular는 평균 곡률이 일정한 연속적인 얇은 쉘로 구성되어있어 응력 집중 없이 동일 평면 응력에 의해서만 외부 하중에 저항 할 수 있기 때문에 매우 낮은 밀도에서 우수한 기계적 특성을 가지고 있다. 이 논문은 트러스 프레임 위에 수지 필름을 펴고 경화시켜 쉘을 제작하는 새로운 방법을 제시한다. 즉, 먼저 트러스 프레임을 3D 프린팅으로 형성하고 두 가지 유형의 수지를 사용하여 열가소성 및 열경화성 폴리머의 매끄러운 쉘을 형성한다. 압축 특성은 셸형, 즉 프레임 위로 팽팽하게 늘어난 셸이 독립형 프레임에 비해 강도와 강성을 크게 향상시킨다는 것을 보여준다. Shellular has excellent mechanical properties at very low densities as it is composed of a continuous thin shell with a constant mean curvature that enables it to resist external loads by coplanar stresses alone without stress concentration. This paper presents a novel fabrication method for shellular by stretching a resin film over a truss frame and subsequent curing. First, a truss frame is formed by 3D printing; then, two types of resins are used to form smooth thermoplastic and thermosetting polymer shells. The compression properties reveal that the shellulars, i.e., the shells stretched tightly over the truss frame have significantly enhanced strength and stiffness compared with the standalone frames.