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Deuterium-incorporated Gate Oxide of MOS Devices Fabricated by Using Deuterium Ion Implantation
이재성,Kevin L. Lear 한국물리학회 2012 THE JOURNAL OF THE KOREAN PHYSICAL SOCIETY Vol.60 No.7
In the aspect of metal-oxide-semiconductor (MOS) device reliability, deuterium-incorporated gate oxide could be utilized to suppress the wear-out that is combined with oxide trap generation. An alternative deuterium process for the passivation of oxide traps or defects in the gate oxide of MOS devices has been suggested in this study. The deuterium ion is delivered to the location where the gate oxide resides by using an implantation process and subsequent N2 annealing process at the back-end of metallization process. A conventional MOS field-effect transistor (MOSFET) with a 3-nm-thick gate oxide and poly-to-ploy capacitor sandwiched with 20-nm-thick SiO2 were fabricated in order to demonstrate the deuterium effect in our process. An optimum condition of ion implantation was necessary to account for the topography of the overlaying layers in the device structure and to minimize the physical damage due to the energy of the implanted ion. Device parameter variations, the gate leakage current, and the dielectric breakdown phenomenon were investigated in the deuterium-ion-implanted devices. We found the isotope effect between hydrogen- and deuterium-implanted devices and an improved electrical reliability in the deuterated gate oxide. This implies that deuterium bonds are generated effectively at the Si/SiO2 interface and in the SiO2 bulk.