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Reducing the Memory Bandwidth Overheads of Hardware Security Support for Multi-Core Processors
Junghoon Lee,Taehoon Kim,Jaehyuk Huh IEEE 2016 IEEE Transactions on Computers Vol. No.
<P>To prevent physical attacks on systems, secure processors have been proposed to reduce trusted computing base to the processor itself. In a secure processor, all off-chip data are encrypted and their integrity is protected. This paper investigates how the limited memory bandwidth of multi-core processors affects the design of secure processors. Although the performance of a single-core secure processor has improved significantly with the counter-mode encryption combined with Bonsai Merkle Tree, our results indicate that multi-core secure processors can suffer from significant performance degradation due to the limited memory bandwidth. To mitigate the performance overheads, this paper proposes three techniques for the multi-core design of secure processors. First, the paper advocates to use a combined cache for all normal and security-supporting data. Second, the paper proposes memory scheduling and mapping schemes for secure processors. Finally, the paper investigates a type-aware cache insertion scheme considering the distinct characteristics of normal and security-supporting data. Our simulation results show that the combined techniques reduce the performance degradation for supporting full confidentiality and integrity, from 25-34 percent to less than 8-14 percent in 8-core and 16-core secure processors, with minimal extra hardware costs.</P>
Environment Adaptive Emergency Evacuation Route GUIDE through Digital Signage Systems
Lee, Dongwoo,Kim, Daehyun,Lee, Junghoon,Lee, Seungyoun,Hwang, Hyunsuk,Mariappan, Vinayagam,Lee, Minwoo,Cha, Jaesang The International Promotion Agency of Culture Tech 2017 International Journal of Advanced Culture Technolo Vol.5 No.1
Nowadays, the most of commercial buildings are build-out with complex architecture and decorated with more complicated interiors of buildings so establishing intelligible escape routes becomes an important case of fire or other emergency in a limited time. The commercial buildings are already equipped with multiple exit signs and these exit signs may create confusion and leads the people into different directions under emergency. This can jeopardize the emergency situation into a chaotic state, especially in a complex layout buildings. There are many research focused on implementing different approached to improve the exit sign system with better visual navigating effects, such as the use of laser beams, the combination of audio and video cues, etc. However the digital signage system based emergency exit sign management is one of the best solution to guide people under emergency situations to escape. This research paper, propose an intelligent evacuation route GUIDE that uses the combination centralized Wireless Sensor Networks (WSN) and digital signage for people safety and avoids dangers from emergency conditions. This proposed system applies WSN to detect the environment condition in the building and uses an evacuation algorithm to estimate the safe route to escape using the sensor information and then activates the signage system to display the safe evacuation route instruction GUIDE according to the location the signage system is installed. This paper presented the prototype of the proposed signage system and execution time to find the route with future research directions. The proposed system provides a natural intelligent evacuation route interface for self or remote operation in facility management to efficiently GUIDE people to the safe exit under emergency conditions.
Mutually Aware Prefetcher and On-Chip Network Designs for Multi-Cores
Junghoon Lee,Hanjoon Kim,Minjeong Shin,Kim, John,Jaehyuk Huh IEEE 2014 IEEE TRANSACTIONS ON COMPUTERS - Vol.63 No.9
<P>Hardware prefetching has become an essential technique in high performance processors to hide long external memory latencies. In multi-core architectures with cores communicating through a shared on-chip network, traffic generated by the prefetchers can account for up to 60% of the total on-chip network traffic. However, the distinct characteristics of prefetch traffic have not been considered in on-chip network design. In addition, prefetchers have been oblivious to the network congestion. In this work, we investigate the interactions between prefetchers and on-chip networks, exploiting the synergy of these two components in multi-cores. Firstly, we explore the design space of prefetch-aware on-chip networks. Considering the difference between prefetch and non-prefetch packets, we propose a priority-based router design, which selects non-prefetch packets first over prefetch packets. Secondly, we investigate network-aware prefetcher designs. We propose a prefetch control mechanism sensitive to network congestion-throttling prefetch requests based on the current network congestion. Our evaluation with full system simulations shows that the combination of the proposed prefetch-aware router and congestion-sensitive prefetch control improves the performance of benchmark applications by 11-12% with out-of-order cores, and 21-22% with SMT cores on average, up to 37% on some of the workloads.</P>
Lee, Junghoon,Han, A-Reum,Yu, Hojeong,Shin, Tae Joo,Yang, Changduk,Oh, Joon Hak American Chemical Society 2013 JOURNAL OF THE AMERICAN CHEMICAL SOCIETY - Vol.135 No.25
<P>Ambipolar polymer semiconductors are highly suited for use in flexible, printable, and large-area electronics as they exhibit both <I>n</I>-type (electron-transporting) and <I>p</I>-type (hole-transporting) operations within a single layer. This allows for cost-effective fabrication of complementary circuits with high noise immunity and operational stability. Currently, the performance of ambipolar polymer semiconductors lags behind that of their unipolar counterparts. Here, we report on the side-chain engineering of conjugated, alternating electron donor–acceptor (D–A) polymers using diketopyrrolopyrrole-selenophene copolymers with hybrid siloxane-solubilizing groups (<B>PTDPPSe-Si</B>) to enhance ambipolar performance. The alkyl spacer length of the hybrid side chains was systematically tuned to boost ambipolar performance. The optimized three-dimensional (3-D) charge transport of <B>PTDPPSe-Si</B> with pentyl spacers yielded unprecedentedly high hole and electron mobilities of 8.84 and 4.34 cm<SUP>2</SUP> V<SUP>–1</SUP> s<SUP>–1</SUP>, respectively. These results provide guidelines for the molecular design of semiconducting polymers with hybrid side chains.</P><P><B>Graphic Abstract</B> <IMG SRC='http://pubs.acs.org/appl/literatum/publisher/achs/journals/content/jacsat/2013/jacsat.2013.135.issue-25/ja403949g/production/images/medium/ja-2013-03949g_0007.gif'></P><P><A href='http://pubs.acs.org/doi/suppl/10.1021/ja403949g'>ACS Electronic Supporting Info</A></P>
Flexible Intelligent Exit Sign Management of Cloud-Connected Buildings
Lee, Minwoo,Mariappan, Vinayagam,Lee, Junghoon,Cho, Juphil,Cha, Jaesang The International Promotion Agency of Culture Tech 2017 International Journal of Advanced Culture Technolo Vol.5 No.1
Emergencies and disasters can happen any time without any warning, and things can change and escalate very quickly, and often it is swift and decisive actions that make all the difference. It is a responsibility of the building facility management to ensure that a proven evacuation plan in place to cover various worst scenario to handled automatically inside the facility. To mapping out optimal safe escape routes is a straightforward undertaking, but does not necessarily guarantee residents the highest level of protection. The emergency evacuation navigation approach is a state-of-the-art that designed to evacuate human livings during an emergencies based on real-time decisions using live sensory data with pre-defined optimum path finding algorithm. The poor decision on causalities and guidance may apparently end the evacuation process and cannot then be remedied. This paper propose a cloud connected emergency evacuation system model to react dynamically to changes in the environment in emergency for safest emergency evacuation using IoT based emergency exit sign system. In the previous researches shows that the performance of optimal routing algorithms for evacuation purposes are more sensitive to the initial distribution of evacuees, the occupancy levels, and the type and level of emergency situations. The heuristic-based evacuees routing algorithms have a problem with the choice of certain parameters which causes evacuation process in real-time. Therefore, this paper proposes an evacuee routing algorithm that optimizes evacuation by making using high computational power of cloud servers. The proposed algorithm is evaluated via a cloud-based simulator with different "simulated casualties" are then re-routed using a Dijkstra's algorithm to obtain new safe emergency evacuation paths against guiding evacuees with a predetermined routing algorithm for them to emergency exits. The performance of proposed approach can be iterated as long as corrective action is still possible and give safe evacuation paths and dynamically configure the emergency exit signs to react for real-time instantaneous safe evacuation guidance.