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Xin-Yu Shih,Hong-Ru Chou 한국통신학회 2018 ICT Express Vol.4 No.3
This paper presents a reconfigurable Fast Fourier Transform (FFT) hardware architecture for 3GPP LTE systems. In the main FFT computing process, a novel processing kernel engine is proposed to support four configuration types of changeable hybrid-radix FFT operations. Also, in the data storage manipulation, a smart 2D-FIFO structure is used to flexibly handle efficient reading/writing data access for 36 different FFT sizes. In addition to a field-programmable gate array prototyping design approach, we provide application-specific integrated circuit implementation via TSMC 90-nm CMOS technology. The developed FFT chip only occupies a core area of View the MathML source, consumes 24.2 mW of power, and reaches maximum speed of 111.11 MHz.