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      • KCI등재

        핫 엠보싱용 점착방지막으로 사용되는 10nm급 두께의 Teflon-like 박막의 형성 및 특성평가

        차남구,김인권,박창화,임현우,박진구,Cha Nam-Goo,Kim In-Kwon,Park Chang-Hwa,Lim Hyung-Woo,Park Jin-Goo 한국재료학회 2005 한국재료학회지 Vol.15 No.3

        Teflon like fluorocarbon thin films have been deposited on silicon and oxide molds as an antistiction layer for the hot embossing process by an inductively coupled plasma (ICP) chemical vapor deposition (CVD) method. The process was performed at $C_4F_8$ gas flow rate of 2 sccm and 30 W of plasma power as a function of substrate temperature. The thickness of film was measured by a spectroscopic ellipsometry. These films were left in a vacuum oven of 100, 200 and $300^{\circ}C$ for a week. The change of film thickness, contact angle and adhesion and friction force was measured before and after the thermal test. No degradation of film was observed when films were treated at $100^{\circ}C$. The heat treatment of films at 200 and $300^{\circ}C$ caused the reduction of contact angles and film thickness in both silicon and oxide samples. Higher adhesion and friction forces of films were also measured on films treated at higher temperatures than $100^{\circ}C$. No differences on film properties were found when films were deposited on either silicon or oxide. A 100 nm silicon template with 1 to $500\;{\mu}m$ patterns was used for the hot embossing process on $4.5\;{\mu}m$ thick PMMA spun coated silicon wafers. The antistiction layer of 10 nm was deposited on the silicon mold. No stiction or damages were found on PMMA surfaces even after 30 times of hot embossing at $200^{\circ}C$ and 10 kN.

      • KCI등재

        기상 자기조립박막 법을 이용한 나노임프린트용 점착방지막 형성 및 특성평가

        차남구,김규채,박진구,정준호,이응숙,윤능구,Cha, Nam-Goo,Kim, Kyu-Chae,Park, Jin-Goo,Jung, Jun-Ho,Lee, Eung-Sug,Yoon, Neung-Goo 한국재료학회 2007 한국재료학회지 Vol.17 No.1

        Nanoimprint lithography (NIL) is a new lithographic method that offers a sub-10nm feature size, high throughput, and low cost. One of the most serious problems of NIL is the stiction between mold and resist. The antistiction layer coating is very effective to prevent this stiction and ensure the successful NIL results. In this paper, an antistiction layer was deposited by VSAM (vapor self assembly monolayer) method on silicon samples with FOTS (perfluoroctyltrichlorosilane) as a precursor for making an antistiction layer. A specially designed LPCVD (low pressure chemical vapor deposition) was used for this experiment. All experiments were achieved after removing the humidity. First, the evaporation test of FOTS was performed for checking the evaporation temperature at low pressure. FOTS was evaporated at 5 Tow and $110^{\circ}C$. In order to evaluate the temperature effect on antistiction layer, chamber temperature was changed from 50 to $170^{\circ}C$ with 0.1ml of FOTS for 1 minute. Good hydrophobicity of all samples was shown at about $110^{\circ}$ of contact angle and under $20^{\circ}$ of hysteresis. The surface energies of all samples calculated by Lewis acid/base theory was shown to be about 15mN/m. The deposited thicknesses of all samples measured by ellipsometry were almost 1nm that was similar value of the calculated molecular length. The surface roughness of all samples was not changed after deposition but the friction force showed relatively high values and deviations deposited at under $110^{\circ}$. Also the white circles were founded in LFM images under $110^{\circ}$. High friction forces were guessed based on this irregular deposition. The optimized VSAM process for FOTS was achieved at $170^{\circ}C$, 5 Torr for 1 hour. The hot embossing process with 4 inch Si mold was successfully achieved after VSAM deposition.

      • KCI등재

        실험 계획법을 이용한 점착방지막용 플라즈마 증착 공정변수의 최적화 연구

        차남구,박창화,조민수,박진구,정준호,이응숙,Cha Nam-Goo,Park Chang-Hwa,Cho Min-Soo,Park Jin-Goo,Jeong Jun-Ho,Lee Eung-Sug 한국재료학회 2005 한국재료학회지 Vol.15 No.11

        NIL (nanoimprint lithography) technique has demonstrated a high potential for wafer size definition of nanometer as well as micrometer size patterns. During the replication process by NIL, the stiction between the stamp and the polymer is one of major problems. This stiction problem is moi·e important in small sized patterns. An antistiction layer prevents this stiction ana insures a clean demolding process. In this paper, we were using a TCP (transfer coupled plasma) equipment and $C_4F_8$ as a precursor to make a Teflon-like antistiction layer. This antistiction layer was deposited on a 6 inch silicon wafer to have nanometer scale thicknesses. The thickness of deposited antistiction layer was measured by ellipsometry. To optimize the process factor such as table height (TH), substrate temperature (ST), working pressure (WP) and plasma power (PP), we were using a design of experimental (DOE) method. The table of full factorial arrays was set by the 4 factors and 2 levels. Using this table, experiments were organized to achieve 2 responses such as deposition rate and non-uniformity. It was investigated that the main effects and interaction effects between parameters. Deposition rate was in proportion to table height, working pressure and plasma power. Non-uniformity was in proportion to substrate temperature and working pressure. Using a response optimization, we were able to get the optimized deposition condition at desired deposition rate and an experimental deposition rate showed similar results.

      • KCI등재

        PECVD를 이용한 금속 스탬프용 점착방지막 형성과 특성 평가

        차남구,박창화,조민수,김규채,박진구,정준호,이응숙,Cha, Nam-Goo,Park, Chang-Hwa,Cho, Min-Soo,Kim, Kyu-Chae,Park, Jin-Goo,Jeong, Jun-Ho,Lee, Eung-Sug 한국재료학회 2006 한국재료학회지 Vol.16 No.4

        Nanoimprint lithography (NIL) is a novel method of fabricating nanometer scale patterns. It is a simple process with low cost, high throughput and resolution. NIL creates patterns by mechanical deformation of an imprint resist and physical contact process. The imprint resist is typically a monomer or polymer formulation that is cured by heat or UV light during the imprinting process. Stiction between the resist and the stamp is resulted from this physical contact process. Stiction issue is more important in the stamps including narrow pattern size and wide area. Therefore, the antistiction layer coating is very effective to prevent this problem and ensure successful NIL. In this paper, an antistiction layer was deposited and characterized by PECVD (plasma enhanced chemical vapor deposition) method for metal stamps. Deposition rates of an antistiction layer on Si and Ni substrates were in proportion to deposited time and 3.4 nm/min and 2.5 nm/min, respectively. A 50 nm thick antistiction layer showed 90% relative transmittance at 365 nm wavelength. Contact angle result showed good hydrophobicity over 105 degree. $CF_2$ and $CF_3$ peaks were founded in ATR-FTIR analysis. The thicknesses and the contact angle of a 50 nm thick antistiction film were slightly changed during chemical resistance test using acetone and sulfuric acid. To evaluate the deposited antistiction layer, a 50 nm thick film was coated on a stainless steel stamp made by wet etching process. A PMMA substrate was successfully imprinting without pattern degradations by the stainless steel stamp with an antistiction layer. The test result shows that antistiction layer coating is very effective for NIL.

      • KCI등재

        마이크로 구조물 형성을 위한 핫 엠보싱용 플라스틱 스탬프 제작

        차남구,박창화,임현우,박진구,정준호,이응숙,Cha Nam-Goo,Park Chang-Hwa,Lim Hyun-Woo,Park Jin-Goo,Jeong Jun-Ho,Lee Eung-Sug 한국재료학회 2005 한국재료학회지 Vol.15 No.9

        Nanoimprinting lithography (NIL) is known as a suitable technique for fabricating nano and micro structures of high definition. Hot embossing is one of NIL techniques and can imprint on thin films and bulk polymers. Key issues of hot embossing are time and expense needed to produce a stamp withstanding a high temperature and pressure. Fabrication of a metal stamp such as an electroplated nickel is cost intensive and time consuming. A ceramic stamp made by silicon is easy to break when the pressure is applied. In this paper, a plastic stamp using a high temperature epoxy was fabricated and tested. The plastic stamp was relatively inexpensive, rapid to produce and durable enough to withstanding multiple hot embossing cycles. The merits of low viscosity epoxy solutions were a fast degassing and a rapid filling the microstructures. The hot embossing process with plastic stamp was performed on PMMA substrates. The hot embossing was conducted at 12.6 bar, $120^{\circ}C$ and 10 minutes. An imprinted PMMA wafer was almost same value of the plastic stamp after 10 times embossing. Entire fabrication process from silicon master to plastic stamp was completed within 12 hours.

      • KCI등재

        연마제 특성에 따른 차세대 금속배선용 Al CMP (chemical mechanical planarization) 슬러리 평가

        차남구,강영재,김인권,김규채,박진구,Cha, Nam-Goo,Kang, Young-Jae,Kim, In-Kwon,Kim, Kyu-Chae,Park, Jin-Goo 한국재료학회 2006 한국재료학회지 Vol.16 No.12

        It is seriously considered using Al CMP (chemical mechanical planarization) process for the next generation 45 nm Al wiring process. Al CMP is known that it has a possibility of reducing process time and steps comparing with conventional RIE (reactive ion etching) method. Also, it is more cost effective than Cu CMP and better electrical conductivity than W via process. In this study, we investigated 4 different kinds of slurries based on abrasives for reducing scratches which contributed to make defects in Al CMP. The abrasives used in this experiment were alumina, fumed silica, alkaline colloidal silica, and acidic colloidal silica. Al CMP process was conducted as functions of abrasive contents, $H_3PO_4$ contents and pressures to find out the optimized parameters and conditions. Al removal rates were slowed over 2 wt% of slurry contents in all types of slurries. The removal rates of alumina and fumed silica slurries were increased by phosphoric acid but acidic colloidal slurry was slightly increased at 2 vol% and soon decreased. The excessive addition of phosphoric acid affected the particle size distributions and increased scratches. Polishing pressure increased not only the removal rate but also the surface scratches. Acidic colloidal silica slurry showed the highest removal rate and the lowest roughness values among the 4 different slurry types.

      • KCI등재

        접착방지막과 접착막을 동시에 적용한 대면적 Au/Pd 트랜스퍼 프린팅 공정 개발

        차남구,Cha, Nam-Goo 한국재료학회 2009 한국재료학회지 Vol.19 No.8

        This paper describes an improved strategy for controlling the adhesion force using both the antiadhesion and adhesion layers for a successful large-area transfer process. An MPTMS (3-mercaptopropyltrimethoxysilane) monolayer as an adhesion layer for Au/Pd thin films was deposited on Si substrates by vapor self assembly monolayer (VSAM) method. Contact angle, surface energy, film thickness, friction force, and roughness were considered for finding the optimized conditions. The sputtered Au/Pd ($\sim$17 nm) layer on the PDMS stamp without the anti-adhesion layer showed poor transfer results due to the high adhesion between sputtered Au/Pd and PDMS. In order to reduce the adhesion between Au/Pd and PDMS, an anti-adhesion monolayer was coated on the PDMS stamp using FOTS (perfluorooctyltrichlorosilane) after $O_2$ plasma treatment. The transfer process with the anti-adhesion layer gave good transfer results over a large area (20 mm $\times$ 20 mm) without pattern loss or distortion. To investigate the applied pressure effect, the PDMS stamp was sandwiched after 90$^{\circ}$ rotation on the MPTMS-coated patterned Si substrate with 1-${\mu}m$ depth. The sputtered Au/Pd was transferred onto the contact area, making square metal patterns on the top of the patterned Si structures. Applying low pressure helped to remove voids and to make conformal contact; however, high pressure yielded irregular transfer results due to PDMS stamp deformation. One of key parameters to success of this transfer process is the controllability of the adhesion force between the stamp and the target substrate. This technique offers high reliability during the transfer process, which suggests a potential building method for future functional structures.

      • KCI등재

        IPA 저온 접합법을 이용한 PMMA Micro CE Chip의 제작

        차남구,박창화,임현우,조민수,박진구,Cha, Nam-Goo,Park, Chang-Hwa,Lim, Hyun-Woo,Cho, Min-Soo,Park, Jin-Goo 한국재료학회 2006 한국재료학회지 Vol.16 No.2

        This paper reports an improved bonding method using the IPA (isopropyl alcohol) assisted low-temperature bonding process for the PMMA (polymethylmethacrylate) micro CE (capillary electrophoresis) chip. There is a problem about channel deformations during the conventional processes such as thermal bonding and solvent bonding methods. The bonding test using an IPA showed good results without channel deformations over 4 inch PMMA wafer at $60^{\circ}C$ and 1.3 bar for 10 minutes. The mechanism of IPA bonding was attributed to the formation of a small amount of vaporized acetone made from the oxidized IPA which allows to solvent bonding. To verify the usefulness of the IPA assisted low-temperature bonding process, the PMMA micro CE chip which had a $45{\mu}m$ channel height was fabricated by hot embossing process. A functional test of the fabricated CE chip was demonstrated by the separation of fluorescein and dichlorofluorescein. Any leakage of liquids was not observed during the test and the electropherogram result was successfully achieved. An IPA assisted low-temperature bonding process could be an easy and effective way to fabricate the PMMA micro CE chip and would help to increase the yield.

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