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신미령(Meiling Shen),김상철(Sangchul Kim) 한국정보기술학회 2010 한국정보기술학회논문지 Vol.8 No.1
Designing with a semiconductor layout editor is carried out in a way that a designer places design objects on a wafer plane. In this paper, a method is proposed which shows the view of its cross section for a given layout data. Viewing the cross sections of layout designs enables detecting design faults before fabrication process. To our survey, few previous researches have been published on methods for viewing cross sections of semiconductor layouts. Also, by providing a functionality of showing partial cross sections, not supported by other tools, the proposed method significantly decreases the processing time when only a portion of a circuit is required to be cross sectionally viewed. The proposed method has been adopted by a domestic commercial layout design tool, and the level of user satisfaction is high in that users can detect design faults inside the wafer and fast view the cross section for the portion of a circuit that they have interests in.