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송승완,최찬섭,정형근,권영식 ( Seung Wan Song,Chan Sup Choi,Hyung Keun Chung,Young Sik Kwon ) 한국물환경학회 1996 한국물환경학회지 Vol.12 No.1
This study was carried out to investigate the pH, major anions (SO₄^(2-), NO₃^-,Cl^-), major cations (Ca^(2+), Na^+), ANC (acid neutralizing capacity), and the anions adsorption capacity of the soils collected from the hill at Yonsei campus and the mountain near Yonsei campus. The soil collected from the mountain near Yonsei campus had higher ANC and pH than those collected from the hill at Yonsei campus, indicating that the hill at Yonsei campus is more affected by acid rain or acid precipitation. It has shown that nitrate did not be adsorbed onto soil. The reason is that over the zero point of charge, the electric charge of the colloid in soil becomes minus, so there is no attractive force between soil and nitrate. Chloride and sulfate were adsorbed onto the soil significantly. However the adsorption capacities of these anions were changed in accordance with the hydrogen ion concentration, the amounts of exchangeable cations, and the amounts of leaching Al^(3+), Fe^(3+) in soil solution. As hydrogen ion concentration increases in soil solution, aluminum and ferric ions would be leached from the soil and replace Si(IV), Mn(IV) in the hydrate lattice. Therefore the electric charge of the colloid in soil becomes minus, which inhibits adsorption of chloride and sulfate. The competition of these conditions would affect the adsorption capacities of these anions.
송승완,김희석 청주대학교 산업과학연구소 2005 産業科學硏究 Vol.22 No.3
In this paper, 8 bit micro-processor core that possible applying concept do prefetch is presented and implemented. Micro-processor that propose consists of Main block, Timer Counter block, Serial block, Multiplication/Division block. Instruction designs and did so that act all instructions except instruction that clyster outside memory in 1 cycle to act patch step separatively with decoding, run phase to consist of patch, decoding, execution three stages. Also, design multiplication/division block design independence and run multiplication and division operation in 1 cycle.
송승완(SeungWan Song),김희석(HeeSeok Kim) 한국정보기술학회 2005 Proceedings of KIIT Conference Vol.2005 No.-
본 논문은 패치 과정을 디코딩, 실행과정과 독립적으로 수행하는 프리패치가 가능한 8비트 마이크로프로세서를 설계하였다. 제안한 마이크로프로세서는 메인블록, 타이머블록, 시리얼블록, 곱셈/나눗셈블록으로 이루어진다. 내부 데이터 메모리와 특수 목적 메모리의 데이터가 ALU에서 연산과정을 거쳐 목적지 레지스터에 저장되기까지 4클럭 내에서 처리되며, 곱셈/나눗셈 블록을 별도로 설계하였다. 따라서 외부 데이터 메모리를 이용한 연산과정을 제외하고 내부 명령어들은 1사이클에 수행한다. In this paper, 8 bit micro-processor core that possible applying concept do prefetch is presented and implemented. Micro-processor that propose consists of Main block, Timer Counter block, Serial block, Multiplication/Division block. Instruction designs and did so that act all instructions except instruction that clyster outside memory in 1 cycle to act patch step separatively with decoding, run phase to consist of patch, decoding, execution three stages. Also, design multiplication/division block design independence and run multiplication and division operation in 1 cycle.