We propose a shared multi-buffer ATM switch, in which each unicast cell has chances to be read from a shared buffer during three consecutive read cycles and each multicast cell is read from a shared buffer if the shared buffer is not acessed for read ...
We propose a shared multi-buffer ATM switch, in which each unicast cell has chances to be read from a shared buffer during three consecutive read cycles and each multicast cell is read from a shared buffer if the shared buffer is not acessed for read of a unicast cell at the last read cycle. The HOL effect that the unicast cells experience is not augmented by the multicast cells and utilization rate of the output port. For a fixed multicast rate, the proposed scheme shows 98.9% throughput even though the offered load reaches 1. We designed the proposed shared multi-buffer ATM switch in 0.6um single-poly triple metal CMOS technology. The designed shared multi-buffer ATM switch has 8 x 8 ports and operates at 20MHz, which supports 155.52Mbps STM-1 source rate for each port.