Hardware-Software Implementation of MPEG-4 Video Codec

다국어 초록 (Multilingual Abstract)

This paper presents an MPEG-4 video codec, called
MoVa, for video coding applications that adopts 3G-324M.
We designed MoVa to be optimal by embedding a costeffective
ARM7TDMI core and partitioning it into
hardwired blocks and firmware blocks to provide a
reasonable tradeoff between computational requirements,
power consumption, and programmability. Typical
hardwired blocks are motion estimation and motion
compensation, discrete cosine transform and quantization,
and variable length coding and decoding, while intra
refresh, rate control, error resilience, error concealment,
etc. are implemented by software. MoVa has a pipeline
structure and its operation is performed in four stages at
encoding and in three stages at decoding. It meets the
requirements of MPEG-4 SP@L2 and can perform either
30 frames/s (fps) of QCIF or SQCIF, or 7.5 fps (in codec
mode) to 15 fps (in encode/decode mode) of CIF at a
maximum clock rate of 27 MHz for 128 kbps or 144 kbps.
MoVa can be applied to many video systems requiring a
high bit rate and various video formats, such as
videophone, videoconferencing, surveillance, news, and
entertainment.