V-대역을 위한 완전 집적된 CMOS 이단 전력증폭기 집적회로 설계

국문 초록 (Abstract)

본 논문에서는 TSMC 65 nm CMOS 공정를 이용하여 V-대역 이단 전력증폭기를 설계 및 제작하였다. 수동소자를 사용한 간단한 구조의 정합회로를 구성하였고, 입력과 출력 정합회로를 모두 집적하였다. Pre-distortion 기법을 통해 전력 이득을 보상해 줌으로써 전력증폭기의 선형성을 향상시켰다. 제작된 전력증폭기는 58.8 GHz의 동작 주파수와 1 V의 동작 전압에서 10.4 dB의 전력 이득, 9.7 dBm의 출력 전력 및 20.8 %의 효율 특성을 나타내었다.

다국어 초록 (Multilingual Abstract)

This paper presents a V-band two-stage power amplifier integrated circuit using TSMC 65 nm CMOS process. The simple input, output, and inter-stage matching networks based on passive components are integrated. By compensating for power gain characteristics using a pre-distortion technique, the linearity of the power amplifier was improved. The implemented two-stage power amplifier showed a power gain of 10.4 dB, a saturated output power of 9.7 dBm, and an efficiency of 20.8 % with a supply voltage of 1 V at the frequency band of 58.8 GHz.

목차 (Table of Contents)

• 요약
• Abstract
• Ⅰ. 서론
• Ⅱ. 회로 설계
• Ⅲ. 제작 및 측정
• Ⅳ. 결론
• References

참고문헌 (Reference)

1 K. Y. Kao, "Phase-delay cold-fet pre-distortion linearizer for millimeterwave CMOS power amplifiers" 61 (61): 4505-4519, 2013

2 J. Y. C. Liu, "Millimeter-wave self-healing power amplifier with adaptive amplitude and phase linearization in 65-nm CMOS" 60 (60): 1342-1352, 2012

3 D. Chowdhury, "Design considerations for 60 GHz transformer-coupled CMOS power amplifiers" 44 (44): 2733-2744, 2009

4 He, Ying, "Design considerations for 60 GHz CMOS power amplifiers" 1613-1616, 2010

5 J. C. Wu, "A 60-GHz single-ended-to-differential vector sum phase shifter in CMOS for phased-array receiver" 1-4, 2011

6 J. Y. C. Liu, "A 60 GHz tunable output profile power amplifier in 65 nm CMOS" 21 (21): 377-379, 2011

7 A. Siligaris, "A 60 GHz power amplifier with 14. 5dBm saturation power and 25 % peak PAE in CMOS 65nm SOI" 168-171, 2009

8 Y. C. Hsu, "A 60 GHz CMOS power amplifier with modified pre-distortion linearizer" 1-4, 2013

9 J. H. Tsai, "A 60 GHz CMOS power amplifier with built-in predistortion linearizer" 21 (21): 676-678, 2011

10 H. Asada, "A 60 GHz CMOS power amplifier using capacitive cross-coupling neutralization with 16 % PAE" 2011 : 554-557, 2011

11 W. Fei, "A 54 to 62. 8 GHz PA with 95. 2 mW/mm2 output power density by 4×4 distributed in-phase power combining in 65nm CMOS" 1-4, 2014

12 N. Kurita, "60 GHz and 80 GHz wide band power amplifier MMICs in 90 nm CMOS technology" 39-42, 2009