As the requirements of embedded systems increase, the design complexity of the system becomes higher. The formal design methodology is required which supports well-balanced specification for control and dataflow to design a complex system. In this pa...
As the requirements of embedded systems increase, the design complexity of the system becomes higher. The formal design methodology is required which supports well-balanced specification for control and dataflow to design a complex system. In this paper, control modules and function modules are separately described with FSMs and dataflow graphs respectively, and integrated into a system specification via inter-model communications. In previous approaches, the system could not be verified until control modules and dataflow modules are combined at the final design stage. However our approach enables us to design each part as the proper model of computation at early stage, and to verify the compositions and to co-synthesize the system effectively in the same framework. Especially this paper focuses on the communication protocols between control and dataflow models. Preliminary experiments show practicality of the proposed technique.