Hardware Implementation of GaN-HEMT Based ZVS DC–DC Converter Considering PCB Layout

다국어 초록 (Multilingual Abstract)

The gallium nitride high electron mobility transistors (GaN HEMT) are among the most promising power semiconductor devices. However, these transistors have a small gate voltage margin compared with conventional power devices. In this paper, the gate voltage of GaN HEMTs is mathematically analyzed when it is applied to a zero voltage switching (ZVS) phase-shift full bridge (PSFB) DC–DC converter. The analysis accounts for nonlinear capacitance characteristics under the ZVS switching condition, and a critical parasitic inductance are derived to restrict the gate voltage to a safety operation area. The optimal layout for bridge topologies and gate drivers is proposed, to satisfy the derived parasitic inductance limitation. A 500-W-power laboratory phase-shift full-bridge DC–DC converter is implemented to verify the proposed layout.

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