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김건웅(Kim, Geon-Woong),최영범(Choi, Young-Bum),김용식(Kim, Yong-Shik),최두성(Choi, Doo-sung),조균형(Cho, Kyun-Hyong) 한국태양에너지학회 2013 한국태양에너지학회 학술대회논문집 Vol.2013 No.4
Recently, the problem of global warming has been recognized as an important factor in determining the growth and future of the nations industrial development. Eco-friendly, low-energy, green growth has emerged as a national growth engine in Korea. For this purpose, the relevant policies and standards are being enacted. The construction industry has execute effort to reduce energy consumption and environmental load. As a example, since 2000, there has been much study for greenhouse gas emissions infrastructure during buildings life cycle. But, there are few researches on the energy consumption on construction stage of the buildings. In this paper, presented computation process of oil consumption on apartment construction stage. Also the oil consumption of 39 apartment case was calculated. Based of results, this study was carried out correlation analysis between total oil consumption and oil consumption of detail works. correlation analysis result, the impact factor of oil consumption were foundation work, reinforced concrete work, excavation work.
MMC-HVDC에 적용된 저항형 및 유도형 SFCL 비교분석
김건웅(Geon-Woong Kim),박상용(Sang-Yong Park),최효상(Hyo-Sang Choi) 대한전기학회 2021 대한전기학회 학술대회 논문집 Vol.2021 No.10
MMC is a new topology of VSC-HVDC. However, when a fault occurs, the fault current rises rapidly due to the discharge of the SM capacitor in the MMC. As a solution, we tried to limit the fault current using SFCL. We modeled MMC and SFCL using PSCAD/EMTDC. After that, resistive type SFCL and inductive type SFCL were applied to MMC to compare and analyze the current limiting rate and interruption characteristics.
계통연계 LVDC 선로에 적용된 초전도 LC공진 DC차단기의 캐패시터 용량에 따른 차단 시뮬레이션
김건웅(Geon-Woong Kim),정지솔(Ji-Sol Jeong),박상용(Sang-Yong Park),최효상(Hyo-Sang Choi) 대한전기학회 2021 대한전기학회 학술대회 논문집 Vol.2021 No.5
Currently, new renewable energy generation and distribution generation are attracting attention worldwide. In addition, conversion facilities are increasing for grid connection. All facilities connected to the Grid are directly or indirectly connected. Therefore, when a fault occurs, a fault current can spread throughout the facilities. Among them, when a fault occurs of a DC line, the fault current does not pass through the zero point, so it is difficult to cut-off. In this paper, we proposed the LC resonant DC circuit breaker that is connected to a superconducting element as an appropriate protection method for this. The superconducting LC resonant DC circuit breaker consists of a superconducting element and a LC resonant DC circuit breaker in series. The resonant frequency that changes according to the capacity of reactor and capacitor affects the cut-off performance, so the capacity selection is very important. We analyzed the cut-off characteristics according to the Capacitor capacity changes using PSCAD/EMTDC.
김건웅(Geon Woong Kim),백승재(Seung Jae Baik) 대한전자공학회 2022 전자공학회논문지 Vol.59 No.1
낸드 플래시 용량 증가를 위해 적층 기술 개발뿐만 아니라 단위 메모리 셀인 전하 트랩 플래시(CTF: Charge Trap Flash)의 스케일링 기술 개발이 필요하다. 전하 트랩 플래시의 스케일링 방향은 고유전율 유전 박막 등의 신소재 개발로 이루어질 것으로 보이며, 이 연구에서는 고유전율 박막을 적용한 전하 트랩 플래시 셀의 이레이즈 동작 시뮬레이션 모델을 제시한다. 본 모델은 평균 트랩 거리, 드리프트 속도, 캐리어 수명을 사용하여 트랩 층에 주입된 전하들의 이동을 직관적으로 이해하기 쉽게 나타낸 모델이다. CTF 커패시터 소자들에서의 시뮬레이션 결과를 실험 측정값과 비교하여 트랩 층의 주요 파라미터인 트랩에너지를 추출할 수 있다. 시뮬레이션 결과의 해석으로부터 얻은 트랩 층의 전자/정공 트랩 에너지는 각각 Si₃N₄(1.42, 0.93 eV), 비정질 HfO₂(1.00, 1.13 eV), 다결정질 HfO₂(1.10, 1.14 eV)이다. For scaling of NAND flash, it is necessary to develop not only stacking technology but also scaling technology for charge trap flash (CTF), which is a unit memory cell. The scaling direction of the charge trap flash is expected to consist of the development of new materials such as high-k dielectric films, and in this study, presents a simulation model of the erase operation of a charge trap flash cell to which a high-k thin film is applied. This model uses the average trap distance, drift velocity, and carrier lifetime to intuitively and easily understand the movement of charges injected into the trap layer. The trap energy, which is a major parameter of the trap layer, can be extracted by comparing the simulation results and experimental measurements in the CTF capacitor devices. The electron/hole trap energies of the trap layer obtained from the analysis of the simulation results were Si₃N₄(1.42, 0.93 eV), HfO₂_amorphous(1.00, 1.13 eV), HfO₂_polycrystalline(1.10, 1.14 eV), respectively.
밴드 엔지니어링을 통해 터널링 전류의 온/오프 비율을 최대화하는 방법에 관한 연구
김건웅(Geon-Woong Kim),백승재(Seung Jae Baik) 대한전자공학회 2019 대한전자공학회 학술대회 Vol.2019 No.11
Tunneling probabilities and tunneling currents with various energy band profiles are calculated. which gives a concept design for device scaling of charge trap flash (CTF). We have assumed five different energy band profiles based on compositional variations of SiO₂ and Si₃N₄ that is most favorable material combination as a tunneling dielectric in flash memories. As a result, we found that monotonic compositional grading with SiO₂ on the channel side gives the largest on/off ratio in tunneling current, in other words, the fastest program/erase operation with longest charge retention can be realized using that band profiling on the tunnel layer of CTF.